研究生: |
張哲瑋 Che-Wei Chang |
---|---|
論文名稱: |
具多模式控制之高效率降壓型轉換器 High Efficiency Buck Converter with Multi-Mode Control |
指導教授: |
林景源
Jing-Yuan Lin |
口試委員: |
許益捷
Yi-Chieh Hsu 林景源 Jing-Yuan Lin 邱煌仁 Huang-Jen Chiu 張佑丞 Yu-Chen Chang |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2021 |
畢業學年度: | 109 |
語文別: | 中文 |
論文頁數: | 79 |
中文關鍵詞: | 漣波調變定截止時間控制 、降壓型轉換器 、隨輸入電壓變頻 、隨負載變頻 、波峰電壓切換 |
外文關鍵詞: | Fixed off-time control, Buck converter, Variable frequency with input voltage, Variable frequency with current, Peak voltage switching |
相關次數: | 點閱:261 下載:0 |
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近年來隨著科技日新月異,可攜式電子產品需求逐漸增加,用來提供電源且具有小體積以及高效能的切換式穩壓器越來越重要。為了使電路達到高效能,因此改善不同負載下的切換頻率,本論文所提出使用漣波調變定截止時間控制(Fixed Off-time Control, FOT)的降壓型轉換器,並加上隨負載變頻以及波峰電壓切換機制來提升轉換效能。一般而言,在傳統的漣波調變定截止時間控制架構,整體的系統頻率皆會隨著輸入電壓上升而上升,此時的切換損耗亦隨著上升。故本論文藉由新型FOT控制使得系統切換頻率隨著輸入電壓上升而下降,藉此大量降低切換損耗。此外,在輕載時轉換效能由切換損所主導,故本論文提出兩種機制分別為隨負載變頻(Variable Frequency with Current, VFC)以及波峰電壓切換(Peak Voltage Switching, PVS)使切換損有效降低;重載時,本論文提出的隨負載變頻機制使電路能有較高的轉換效能。
本晶片以TSMC T18HVG2製程實現,晶片面積含PADs為1.97×1.71485 mm2。輸入電壓範圍為16 V至32 V以及輸出電壓為12 V,切換頻率434.87kHz至999.9kHz,外接的電感與電容分別為18μH與10μF,輸出負載範圍為60mA至600mA。當負載為60mA至100mA 時,控制模式使用隨負載變頻機制;當負載為100mA至200mA 時,控制模式為雙模式(隨負載變頻以及波峰電壓切換) ;當負載為200mA至600mA 時,控制模式使用隨負載變頻機制。量測顯示最高效率點發生在負載為550mA,效率可達92.64%。
In recent years, with the rapid of science and technology, the increasing demand of portable products, used to provide power of portable products with small size and high efficiency power converter becomes more and more important. In order to achieve high efficiency of the circuit and therefore improve the switching frequency under different loads, this thesis proposes a buck converter that uses ripple-based modulation fixed off-time(FOT) control, the variable frequency with current(VFC) control and peak voltage switching(PVS) control are added to improve the conversion efficiency.
Generally speaking, the switching frequency of traditional FOT control increases with the input voltage, and the switching losses also increases with this. Therefore, this thesis uses a new type of FOT control to make the system switching frequency decreases as the input voltage increases, thereby greatly reducing switching losses. In addition, the switching efficiency is dominated by switching losses at light load and therefore this thesis proposes two mechanisms: variable frequency with current(VFC) control and peak voltage switching(PVS) to effectively reduce the switching losses. Under full load, this thesis proposes variable frequency with current(VFC) control enables the circuit to have higher conversion efficiency.
This chip is realized by TSMC T18HVG2 process. The chip area contains PADs of 1.97×1.71485 mm2. The input voltage range is 16V to 32V and the output voltage is 12V, the switching frequency is 434.87kHz to 999.9kHz , the external inductance and capacitance are 18μH and 10μF, the output load range is 60mA to 600mA. When the load is 60mA to 100mA, the VFC control will turn on, when the load is 100mA to 200mA, the dual mode (VFC and PVS) control will turn on, when the load is 200mA to 600mA the VFC control will turn on. Measurements show that the highest efficiency is 92.64% at output load equal 550mA.
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