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研究生: 程于真
Yu-Jhen Cheng
論文名稱: 局部放電訊號偵測裝置之研製
Development of a Detection Device for Partial Discharge Signals
指導教授: 張宏展
Hong-Chan Chang
口試委員: 吳瑞南
Ruay-Nan Wu
郭政謙
Kuo, Cheng-Chien
李俊耀
Chun-Yao Lee
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2016
畢業學年度: 104
語文別: 中文
論文頁數: 60
中文關鍵詞: 局部放電擷取裝置場效可程式邏輯閘陣列
外文關鍵詞: Partial discharge, capture device, FPGA
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電氣設備長期運轉之下,絕緣材料特性會因不同外在因素影響逐漸劣化,當劣化部位之電場強度大於絕緣材料本身所能承受的絕緣強度時,即會產生局部放電(Partial Discharge, PD)現象。雖然局部放電可能使絕緣劣化而導致損壞,然其劣化發展需一段時間,其發展時間與設備本身運轉狀況、PD位置與設備的絕緣結構等因素有關。若能運用局部放電檢測裝置測量局部放電信號,並進一步分析設備絕緣狀態,應能避免設備無預警崩潰,降低故障發生。
本研究旨在研製一套局部放電訊號偵測裝置,主要整合高速類比數位轉換器、快速擷取傳送及場效可程式邏輯閘陣列(Field Programmable Gate Array,FPGA)儲存傳送三塊模組。主控台負責下達給各個模組指令,功能為資料的儲存接收和運算判斷;高速類比數位轉換模組負責將擷取到的類比訊號轉換成數位訊號;快速擷取傳送模組負責將擷取到的資料透過USB快速的傳送到主控台;FPGA儲存傳送模組負責將快速大量擷取的訊號暫時儲放再傳送到主控台。擷取訊號後判斷信號是否為PD訊號,確定後計算局部放電電壓最大值、平均放電量和放電次數。為驗證所提出局部放電偵測裝置之可行性,本研究設計不同案例,與Teledyne LeCroy WaveRunner 610Zi示波器和NI的工業電腦作分析與比較,結果顯示本裝置對於高達50MHz,仍能有效偵測局部放電信號。


When the electrical equipment is in long-term operation, the insulating material characteristics deteriorate gradually under the effect of different external factors. When the electric field intensity in the deterioration position is higher than the allowable insulating strength of the insulating material, the Partial Discharge (PD) phenomenon is generated. The PD may deteriorate insulation causing damage, but the deterioration development takes a while. The development time is related to the equipment operating condition, PD position and insulation structure of equipment. If the PD signal can be measured by using PD detection device, and the equipment insulation state is analyzed, the unwarned equipment breakdown may be prevented, the fault occurrence is reduced.
This study aims to develop a PD signal detection device, integrated with high speed analog-digital converter, rapid capture transfer and Field Programmable Gate Array (FPGA) storage transfer modules. The master station issues instructions to various modules, so as to store, receive, calculate and judge data. The high speed analog-to-digital conversion module converts the captured analog signal into digital signal. The rapid capture transfer module transfers the captured data via USB to the master station rapidly. The FPGA storage transfer module stores the rapidly captured signals temporarily and sends them to the master station. If the captured signal is identified as PD signal, the maximum value of PD voltage, mean discharge and numbers of discharge are calculated. In order to validate the feasibility of the proposed PD detection device, different cases are designed in this study, and compared with Teledyne LeCroyWaveRunner 610Zi oscillograph and NI industrial computer. The results show that this device can detect as high as 50MHz PD signal effectively.

中文摘要 I 目 錄 IV 圖 目 錄 VI 表 目 錄 VIII 第一章 緒論 1 1.1 研究背景與動機 1 1.2 研究方法 2 1.3 局部放電文獻回顧 3 1.4 章節概要 8 第二章 局部放電檢測介紹 9 2.1 局部放電產生原因 9 2.2 局部放電相關名詞 11 2.3 試驗程序 14 第三章 擷取裝置系統架構及訊號處理流程 17 3.1 系統架構 17 3.2 FPGA簡介 18 3.2.1 FPGA設計流程 21 3.2.2 開發環境之軟體平台 23 3.3 類比數位轉換器介紹 24 3.3.1 介面JESD204B和低壓差分信號(Low-Voltage Differential Signaling, LVDS)比較 26 3.4 LabVIEW簡介 27 3.5 訊號擷取 28 3.5.1 感測器介紹 28 3.5.2 TI TSW14J10介紹 31 第四章 模擬結果與驗證 36 4.1 擷取器控制與評估有效性 36 4.2 局部放電案例設計與比較 42 4.2.1 案例一:輸入25MHz、1Vp-p正弦波訊號 42 4.2.2 案例二:擷取3種頻率的PD訊號 44 4.2.3 案例三:擷取50MHz的PD訊號 50 4.3 模擬結果與探討 51 第五章 結論與未來展望 53 5.1 結論 53 5.2 未來展望 54 參考文獻 55

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