薄膜因具有結構微型化及與傳統塊材相異且特殊的物理及化學性質，因而被廣泛地應用於半導體、光機電工程等領域上，但是，薄膜材料當中的殘留應力會顯著的影響其材料性能，而在薄膜生長的製程及晶圓製造中針對表面加工的製程所導致的製程應力及缺陷對於產品可能會直接或間接地影響後續製程的良率。本研究透過GIXRD研究CMP製程所造成的製程應力，主要在探討薄膜/基材應力特性對量測所得殘留應力分佈的影響，量測及計算方法也克服了試片間變異及基材對薄膜殘留應力分佈的影響。目前本研究已找出兩種造成CMP製程應力的機制，為表層附加張及壓應力，並比較銅薄膜與鎢薄膜CMP後的薄膜殘留應力分佈，同時在本研究也對晶圓的次表面晶體曲率半徑(Radius of sub-surface lattice curvature)進行量測及探討，結果發現晶圓正反面的曲率半徑不是呈現Inverse的關係，而是取決於各自的表面狀態，其負曲率半徑可量測範圍為14至975 m。另藉由CMP實驗及ANSYS模擬來探討晶圓翹曲對CMP製程材料移除率(MRR)及不均勻度(N.U.)的影響。X光反射率(XRR)、低掠角X光繞射(GIXRD)、X光電子能譜儀(XPS)及CMP動態電化學分析則被用來研究鈍化層的生成與刮損及對CMP後表面品質與製程應力的影響，因此可量測及評估鈍化層厚度，兩款Cu-CMP拋光液所產生的鈍化層厚度各約為3 nm及6 nm，並從動電位極化曲線(PD-Curve)上觀察到CMP時鈍化層生成及刮損的過程。本研究成果可作為CMP在銅製程的製程應力評估及日後發展無應力(Stress-Free)CMP製程之參考。

Thin film technology has been widely applied on IC, Opto-Electronics and related application due to the advantages of structure minimization and specific physical and chemical properties compared with traditional bulk materials. However, the performance of material properties of thin film is strongly affected by the residual stress that is unavoidable after deposition process, thermal annealing and surface abrasive machining. This reasearch is to investigate the residual stress of CMP using GIXRD. Some factors of sample variation, residual stress distribution variations induced by film or substrate thickness have been studied by the developed measurement method. The radius of sub-surface lattice curvature of single crystal silicon wafer have been investigated with the influence of thin film residual stress and wafer fabrication using reflection x-ray rocking curve (XRC) measurement. Then, the CMP experiement and simulated results of ANSYS have been used to discuss the influence of wafer wapage by CMP process. In this study, the XRR, GIXRD, XPS and a dynamic electrochemistry analysis have combined to investigate the formation and wear of passivation layer, also the surface quality and CMP slurry reaction. The dynamic electrochemistry analysis has been performed on an ECMP system to measure the PD-Curve during CMP. The formation and wear process of passivation layer can be observed on PD-Curve. Thererforre, experimental results of this reasarch can be used to evaluate the residual stress induced by Cu-CMP process, and further for developing a stress-freee CMP process.

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