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研究生: 宋ㄧ哲
Yi-Jhe Song
論文名稱: 使用克萊柏架構之新型電壓控制振盪器設計
Design of Novel Voltage-Controlled-Oscillators Using Clapp Structure
指導教授: 張勝良
Sheng-Lyang Jang
口試委員: 徐敬文
C.W. Hsue
黃進芳
Jhin-Fang Huang
馮武雄
Wu-Shiung Feng
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 英文
論文頁數: 140
中文關鍵詞: 克萊伯壓控振盪器除頻器二極體四相位壓控振盪器
外文關鍵詞: Clapp, voltage controlled oscillator (VCO), injection locked frequency divider (ILFD), Diode, QVCO
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壓控振盪器與除頻器是頻率合成器電路中主要的電路之一。對壓控振盪器而言,低相位雜訊可避免相鄰雜訊訊號經由混波轉換的干擾。而振盪器的輸出則經由除頻器來達成降頻的工作,因此,除頻器需具有高頻操作,寬的操作頻寬及低功率消耗。
首先,主動電感負載電路因為沒有被動電感所以非常節省晶片面積,且可調範圍與注入鎖定範圍皆可超出已往的L-C振盪器,本電路是使用主動電感來呈現串連疊接注入鎖定除頻器,在這裡我們研究不同的注入方式的差異與在差動的情形下會有除1,2,3,4,5特性,已在0.18 μm CMOS 1P6M製程上實現,在電源1.5V量測到頻率可調範圍從0.13GHz到2.93GHz,晶片面積為0.504*0.294mm2.
其次,我們呈現CMOS LC克萊柏電壓控制振盪器。在克萊柏電壓控制振盪器裡使用了可調式串連震盪腔,已在0.13 μm CMOS 1P8M製程上實現。電源0.9V時操作在18.78 GHz 頻帶在1Hz偏移頻率下的相位雜訊為-109.79 dBc/Hz,且FoM為-187.93 dBc/Hz。電路的功率消耗為5.4mW,可調電壓由0V至1.3V,可調範圍從18.79 GHz至22.22 GHz約為3.43 GHz,晶片面積為0.931 × 0.606 mm2。
最後,一個利用二極體耦合技巧之新式四相位壓控振盪器亦呈現,此技巧將降低電源電壓以至減低功率的消耗。在電源0.54V時操作在4.587 GHz 頻帶在1Hz偏移頻率下的相位雜訊為-119.62 dBc/Hz,且FoM為-190.35 dBc/Hz.,功率消耗為1.78mW。可調電壓由0V至1.1V,可調範圍從4.295 GHz至5.185 GHz約為890 MHz,晶片面積為0.506 × 0.905 mm2。


The key building blocks in the frequency synthesizer are the voltage controlled oscillator (VCO) and the high frequency divider circuit. Most importantly, low phase-noise is required to avoid corrupting the mixer-converted signal by close interfering tones for VCO circuit. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption.
Firstly, this thesis presents an injection locked frequency divider (ILFD) employing tunable active inductors for the LC tanks. The aim of using tunable active inductor is to extend the locking range and scaling down chip size. This thesis proposes a top-series injection locked frequency divider (ILFD) with a tunable active inductor with variable division ratio and studies the effect of injection methods on the property of ILFD. With a differential injection the ILFD has the modulus of 1, 2, 3, 4, and 5. The ILFD was fabricated in the 0.18μm 1P6M CMOS technology, and at the supply voltage of 1.5V, the free-running divider is tunable from 0.13GHz to 2.93GHz. The die area is 0.504 × 0.294 mm2.
Then the new differential voltage-controlled oscillator (VCO) is designed and implemented in a 0.13 μm CMOS 1P8M process. The designed circuit topology is an all nMOS LC tank Clapp VCO using a series-tuned resonator. At the supply voltage of 0.9 V, the output phase noise of the VCO is -109.79 dBc/Hz at 1 MHz offset frequency from the carrier frequency of 18.78 GHz, and the figure of merit is -187.93 dBc/Hz. The core power consumption is 5.4 mW. Tuning range is about 3.43 GHz, from 18.79 to 22.22 GHz, while the control voltage was tuned from 0 to 1.3 V. The die area is 0.931 × 0.606 mm2.
Finally, a novel quadrature VCO (QVCO) is proposed. By using the diode coupling technique, it can reduce supply voltage and power consumption. At the supply voltage of 0.54V, the output phase noise of the QVCO is -119.62 dBc/Hz at 1MHz offset frequency from the carrier frequency of 4.587 GHz, and the figure of merit is -190.35 dBc/Hz. The power consumption of QVCO core is 1.78 mW. Tuning range is about 890 MHz, from 4.295 GHz to 5.185 GHz, while the control voltage was tuned from 0V to 1.1 V. The die area is 0.506 × 0.905 mm2.

中文摘要 I Abstract III Table of Contents VI List of Figures VIII List of Tables XII Chapter 1 Introduction 1 1.1 Background 1 1.2 Thesis Organization 4 Chapter 2 Overview Of Voltage-Controlled Oscillators 6 2.1 Introduction 6 2.2 The Oscillator Theory 7 2.3 Sorts of Oscillators 11 2.3.1 Resonatorless Oscillators 11 2.3.2 LC-Tank Oscillators 14 2.4 Design of Voltage-Controlled Oscillators 16 2.4.1 VCO Characteristic Parameters 18 2.4.2 Phase Noise in Oscillator 20 2.5 Parallel RLC Tank 28 2.5.1 Quality Factor 29 2.5.2 Inductor and Transformer 32 2.5.3 Capacitors and Varactors 48 2.5.4 Resisitors 56 Chapter 3 Tunable Active Inductor Injection Locked Frequency Divider 58 3.1 Introduction 58 3.2 The Active Inductor 59 3.3 The Tunable Active Inductor VCO 64 3.3.1 Small-Signal Characteristics 66 3.3.2 Start-Up Conditions 68 3.3.3 Frequency Tuning Range 69 3.3.4 Large-Signal Behaviore 70 3.4 Injection Locked Frequency Divider 71 3.4.1 Principle of Injection Locked Frequency Divider 72 3.4.2 Locking Range 74 3.5 Design of Tunable Active Inductor ILFD 77 3.6 Measurement Result 80 3.7 Discussion 84 Chapter 4 A Differential Clapp VCO in CMOS Technology 90 4.1 Introduction 90 4.2 Design of Differential Clapp VCO 91 4.3 Design of The Transformers 95 4.4 Measurement Results 97 Chapter 5 CMOS Quadrature VCO Using The Diode Coupling Technique 101 5.1 Introduction 101 5.2 Traditional QVCO Circuit Design 102 5.3 Traditional Quadrature CMOS VCO Design 104 5.4 Design Concept of CMOS Quadrature Ring VCO 109 5.5 Measurement Results 113 Chapter 6 Conclusion 118 References 120

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