電壓控振盪器與除頻器是鎖相迴路電路中，重要的電路之一。鎖相迴路電路大部分的功率消耗都消耗在壓控振盪器與除頻器中，而壓控振盪器被要求一低相位雜訊，用以避免相鄰雜訊訊號經由混波轉換的干擾，經由壓控振盪器的優質指數來判斷振盪器性能的優劣；故本論文呈現一個新式電壓控制振盪器以及一種新型四相位電壓中振盪器。
首先，本論文呈現一個優質指數佳的LC-tank 差動輸出壓控振盪器，在電源 2V時其操作頻率為6.417GHz 採用互補式考畢子交錯耦合PMOS電晶體，以實現更快的啟動震盪，其功率消耗為6.16 mW 且可調變範圍從 6.16 GHz至 6.5 GHz為 5.3 %，其輸出之相位雜訊在距離載波頻率1MHz 處所量測之結果可達-121.12dBc/Hz，其優質指數FOM為-189.37 dBc/Hz。
其次，另一個優質指數佳的LC-tank為差動輸出壓控振盪器，在電源 1.15V時其操作頻率為18GHz，其電路是由cross-coupled的Colpitts負電阻分流平行調變 LC振盪器，其尾端自我偏壓pMOS是做為low phase noise設計。其功率消耗為 8.13 mW 且可調變範圍從 18 GHz至 20.25 GHz為 11.76%，其輸出之相位雜訊在距離載波頻率1MHz 處所量測之結果可達-117.34dBc/Hz，其優質指數FOM為-193.24 dBc/Hz。
最後，一個新式四相位壓控振盪器亦呈現，此電路提出了一種新型的四相位壓控振盪器，它由兩個 n-core交叉耦合壓控振盪器（VCO）與底部串聯的pMOSFET LC環振盪器。在電源 1.24V時其操作頻率為9.25 GHz，功率消耗為9.47 mW 且可調變範圍從9.01 GHz至9.34 GHz為3.6%，其輸出之相位雜訊在距離載波頻率1 MHz 處所量測之結果可達-119.54 dBc/Hz，其優質指數FOM為-189.1 dBc/Hz。

The important blocks in the phase locked loop (PLL) are the voltage controlled oscillator (VCO) and the divider circuit. The most power consumption of PLL consumes in VCO and divider. The VCO is requested a low phase-noise to avoid corrupting the mixer-converted signal by close interfering tones for VCO circuit, and the Figure of Merit (FOM) of VCO can be determined by it’s performance.

First, this thesis describes a differential cross-coupled complementary Colpitts CMOS voltage-controlled oscillator (VCO). Adopts a pair of cross-coupled PMOS transistors to achieve faster start-up oscillation. The VCO operates from 6.16 GHz to 6.5 GHz with 5.3 % tuning range. The measured phase noise at 1 MHz offset is -121.12 dBc/Hz at 6.417 GHz. The power consumption of the VCO core is 6.16 mW. The figure of merit is -189.37 dBc/Hz.

Second, this thesis describes a new fully integrated CMOS voltage-controlled oscillator (VCO) is presented. The VCO is composed of cross-coupled Colpitts negative resistance cell in shunt with a parallel-tunerd LC resonator and the negative resistance cell uses bias-free pMOS tail for low-phase noise design. With the supply voltage of 1.15 V, the VCO is tunable from 18 GHz to 20.25 GHz. while the tuning voltage varies from 0 V to 1.4 V. The phase noise of the VCO operating at 18 GHz is -117.34 dBc/Hz at 1 MHz offset, while the VCO draws 7.07 mA and uses 8.13 mW consumption. The figure of merit is -193.24 dBc/Hz.

Finally, a novel quadrature VCO (QVCO) is showed, This design presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two n-core cross-coupled voltage-controlled oscillators (VCOs) with a bottom-series pMOSFET LC ring. At the supply voltage of 1.24 V, the output phase noise of the QVCO is -119.54 dBc/Hz at 1MHz offset frequency from the carrier frequency of 9.25 GHz, and the figure of merit (FOM) is -189.1 dBc/Hz. The power consumption of QVCO core is 9.47 mW. The free-running frequency of the QVCO is tunable from 9.01 GHz to 9.34 GHz as the tuning voltage is varied from 0.0 V to 1.1 V.

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