在無線通訊系統中，頻率合成器是用來做訊號頻率的升降之用。在頻率合成器電路裡，壓控振盪器與除頻器是重要的核心電路之ㄧ。對壓控振盪器而言，必須提供低相位雜訊的輸出，以避免相鄰雜訊訊號經由混波轉換產生干擾。而振盪器的輸出則經由除頻器來達成降頻的工作，因此，除頻器需具有高頻操作、寬的操作頻寬及低功率消耗。
首先，本論文呈現一個雙頻帶注入鎖定除頻器，完成於台積電零點一八微米製程，此供應電壓0.8V，功率消耗為9.5mW。電路的高頻的可調範圍為3.571至3.974 GHz與低頻的可調範圍為2.278至2.349 GHz。在注入0dBm功率時，低頻除二除頻鎖定範圍從2.87 GHz至5.2 GHz，其百分比為57.7%。高頻除二除頻鎖定範圍從7.1GHz至9.2 GHz，其百分比為25.7%。而高頻除四除頻鎖定操作範圍從13.88GHz至15.94 GHz。晶片面積為0.996*0.868 mm2。
其次，我們呈現一個雙頻帶注入鎖定除頻器上的熱載子效應，完成於台積電零點一八微米製程，此電路的加壓電壓為2.3 V，其量測時間為5個小時。量測結果顯示，隨加壓時間的增加，高頻帶與低頻帶的鎖定範圍會變小，導致電路失去功能。
最後，呈現一個電容開關雙頻帶壓控振盪器，完成於台積電零點一八微米矽鍺製程，此電路供應電壓為0.6 V，功率消耗為4.68 mW。電路的高頻的可調範圍為5.46至5.68 GHz與低頻的可調範圍為2.73至3.44 GHz。高頻帶與低頻帶的FOM分別為-188.4 dBc/Hz及-186.6 dBc/Hz，晶片面積為1 × 0.861 mm2。

In wireless communication system, frequency synthesizers are used to implement the frequency up/down conversion of signal. In a frequency synthesizer, voltage-controlled oscillator (VCO) and divider are the key blocks. For VCOs, low phase-noise output is required to avoid corrupting the mixer-converted signal caused by close interfering tones. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption.
First, this thesis presents a dual-band CMOS injection locked frequency divider, using the TSMC 0.18um 1P6M CMOS process. Measurement results show that at the supply voltage of 0.8 V, the core power consumption is 9.5mW. The free-running frequencies are from 3.571 to 3.974 GHz for the higher-frequency band and the free-running frequencies are from 2.278 to 2.349 GHz for the lower-frequency band. An external injected signal power of 0 dBm provides a low-band divide-by-2 locking range (57.7％) from 2.87 to 5.2GHz and a high-band divide-by-2 locking range (25.7％) from 7.1~9.2GHz. The divide-by-4 operation range is from 13.88 to 15.94GHz. The die area is 0.996 × 0.868 mm2.
Secondly, we present the hot carrier effect on a dual-resonance injection-locked frequency divider. The ILFD was implemented in the TSMC 0.18 μm 1P6M CMOS process and it was stressed at the supply voltage of 2.3V for 5 hours. It is shown that both the high-frequency and low-frequency band locking range decrease as the stress time increases. The measured data shows that the narrow locking range likely leads to circuit failure as RF stress enhances.
Finally, presents a dual-band VCO using varactor-swiching mode, using the TSMC 0.18um SiGe BiCMOS process. Measurement results show that at the supply voltage of 0.6 V, the core power consumption is 4.68 mW. The free-running frequencies are from 5.46 to 5.68 GHz for the higher-frequency band and the free-running frequencies are from 2.73 to 3.44 GHz for the lower-frequency band. The figure of merit is -188.4/-186.6 dBc/Hz at high/low band at 1MHz offset frequency. The die area of the dual-band VCO is 1 × 0.861 mm2.

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