由於製程的進步讓電晶體的面積越來越小，使得晶片上的電晶體數量呈現指數趨勢的成長，導致在進行電壓降分析時需要消耗大量的時間和資源。而近年來，機器學習發展十分迅速，有許多機器學習的方法被應用在預測電壓降上。儘管先前的研究提出了許多各式各樣的特徵來反映電壓降的特性，但仍然還有進步的空間，而且先前的研究都沒考慮到實際電路封裝上的影響，在實際應用中，封裝產生的寄生電阻和電感都會使電壓降變得更加嚴重。此外，之前關於預測電壓降的研究並沒有探討到特徵選取這一塊，先前研究都使用適合各自實驗電路的特徵集，缺乏一個有效的方法去進行特徵選取。所以本研究除了開發了一些新穎的特徵外，我們還提出了一個特徵選取的方法，此方法適用於需要頻繁訓練以及預測的流程，像是工程改變命令 (ECO)，本論文提出的特徵選取方法可以在原始的特徵集中降低72.3%的特徵數量，實驗結果也顯示，比起使用原本的特徵集，經過特徵選取後可以讓均方根誤差 (RMSE)和平均絕對誤差 (MAE)分別降低5.24%和5.49%，同時至少降低60%的訓練及預測時間。

Due to the advancement of semiconductor manufacturing processes, transistor sizes have become increasingly smaller, leading to exponential growth in the number of transistors on a chip. As a result, performing IR drop analysis requires a significant amount of time and resources. With the rapid development of machine learning, numerous machine learning methods have been applied to predict IR drop. Despite previous research proposing various features to reflect the characteristics of IR drop, there seems to be room for improvement. Moreover, previous studies did not consider the package effect in real circuits. In practical applications, the parasitic resistance and inductance in the package can exacerbate IR drop. Furthermore, prior research on IR drop prediction did not explore feature selection. They have primarily used feature sets tailored to their experimental designs, lacking an effective approach for feature selection. Therefore, in this thesis, we developed novel package features and introduced a feature selection method. This method is suitable for IR prediction flows that require frequent training and prediction, such as Engineering Change Order (ECO). It reduces the number of features used. Our experimental results show that using feature selection can lead to a decrease of 5.24% in root-mean-square error (RMSE) and 5.49% in mean absolute error (MAE) compared to using the original feature set. Moreover, it significantly reduces training and prediction time by at least 60%.

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