研究生: |
葉鈞毅 Chun-Yi Yeh |
---|---|
論文名稱: |
電壓調節模組模型化暨電源切換雜訊之 LC參數萃取 Modeling of Voltage Regulator Module and LC extraction of Switching Power Noise |
指導教授: |
林丁丙
Ding-Bing Lin |
口試委員: |
吳宗霖
Tzong-Lin Wu 黃建彰 Chien-Chang Huang 丘建青 Chien-Ching Chiu |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2021 |
畢業學年度: | 109 |
語文別: | 中文 |
論文頁數: | 61 |
中文關鍵詞: | 電源切換雜訊 、電壓調節模組 、電源遞送網路 、暫態電壓雜訊 、暫態電流雜訊 、電源完整性 |
外文關鍵詞: | Switching Power Noise, Voltage Regulator Module, Power Delivery Network, dv/dt noise, di/dt noise, Power Integrity |
相關次數: | 點閱:320 下載:0 |
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本論文主要在研究伺服器電路板中之電壓調節模組(Voltage regulator module, VRM),於電晶體切換時所造成的電源切換雜訊(Switching Power Noise)問題。此高頻的電源切換雜訊可能會透過耦合的方式影響到鄰近的訊號線,進一步干擾系統的電源遞送網路(Power Delivery Network, PDN),影響整體電路的電源完整性(Power Integrity)。本文著重在電源切換雜訊之參數萃取及建構電壓調節模組的等效電路模型,透過諧振頻率原理進行參數萃取,並使用系統性的方式建構等效電路模型,來改善本實驗室先前所提出之簡化電路架構,並模擬暫態電壓之波形。本論文所提出之參數萃取方式可有效萃取電壓調節模組之電感及電容參數,並且可在簡化電路模擬中得到相當精準的諧振頻率。
This thesis is study about the voltage regulator module (VRM) in the server board and the problem of switching power noise caused by the switching of transistors in VRM. This high-frequency switching power noise may affect adjacent signal lines through coupling, interfere with the power delivery network (PDN) of the system, and affect the power integrity of the overall circuit. This thesis focuses on the LC parameter extraction of the switching power noise and the construction of the equivalent circuit model of VRM. The parameter extraction method is according to the principle of resonance frequency and the equivalent circuit model, which improves the previous model proposed by this lab, is constructed to simulate the transient voltage waveforms. The parameter extraction method proposed in this thesis can effectively extract the inductance and capacitance parameters of VRM and can obtain a fairly accurate resonance frequency by the equivalent circuit model.
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[2] H. Shi, "Perturbation based modeling strategy for weakly coupled interconnects," 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, Portland, OR, USA, 2009, pp. 215-218
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[4] S. Wu et al., "Investigation of noise coupling from switching power supply to signal nets," 2010 IEEE International Symposium on Electromagnetic Compatibility, Fort Lauderdale, FL, USA, 2010, pp. 79-84
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[7] E. H. Hsiung, Y. Li, R. Wu, T. Su, Y. Cheng and K. Wu, "A linear 4-element model of VRM —Characteristics, practical uses and limitations," 2012 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Taipei, Taiwan, 2012, pp. 13-16
[8] Y. Ren, W. Shen and K. Xiao, "VR noise analysis and reduction in printed circuit board designs," 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC), Raleigh, NC, USA, 2014, pp. 375-380
[9] S. M. Sandler, "Measurement based VRM modeling," 2017 IEEE 21st Workshop on Signal and Power Integrity (SPI), Lake Maggiore, Italy, 2017, pp. 1-4
[10] Amy Luoh, Gene Garrison, Jon Powell, “Switching Voltage Regulator Noise Coupling Analysis for Printed Circuit Board Systems,” DesignCon 2009.
[11] Amy Luoh, et al., “Methods for Discovering and Mitigating Switching Regulator Noise Coupling for Complex PCB System,” DesignCon 2011.
[12] Laura Kocubinski, Gustavo Blando, Istvan Novak, “Mid-Frequency Noise Coupling between DC-DC Converters and High-Speed Signals,” DesignCon 2016.
[13] A. Bhargava et al., "EMI prediction in switched power supplies by full-wave and non-linear circuit co-simulation," 2009 IEEE International Symposium on Electromagnetic Compatibility, Austin, TX, USA, 2009, pp. 41-46
[14] T. Lopez and R. Elferich, "Accurate performance predictions of power MOSFETs in high switching frequency synchronous buck converters for VRM," 2008 IEEE Power Electronics Specialists Conference, Rhodes, Greece, 2008, pp. 1566-1572,
[15] G. Chen, A. Abou-Alfotouh, Z. Liu, M. Shabban and D. Oh, "Optimization of PCB PDN design using enhanced VRM model," 2014 IEEE International Symposium on Electromagnetic Compatibility (EMC), Raleigh, NC, USA, 2014, pp. 845-849
[16] Y. Wu, Z. Ji, J. Wang and W. Ma, "Noise coupling analysis for high speed differential trace crossing switching voltage regulator area," 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), Suntec City, Singapore, 2018, pp. 12-17
[17] Robert Taylor and Ryan Manack, "Controlling switch-node ringing in synchronous buck converters," Texas Instruments 2Q 2012 Analog Application Journal
[18] Timothy Hegarty, "Reduce buck-converter EMI and voltage stress by minimizing inductive parasitics," Texas Instruments 3Q 2016 Analog Application Journal
[19] Texas Instruments, "Minimizing Switching Ringing at TPS53355 and TPS53353 Family Devices," Application Report (SLUA831A)
[20] Texas Instruments, "Ringing Reduction Techniques for NexFETTM High Performance MOSEFETs," Application Report (SLPA010)
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[22] Y. Wu, Z. Ji, J. Wang and W. Ma, "Noise coupling analysis for high speed differential trace crossing switching voltage regulator area," 2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), Suntec City, Singapore, 2018, pp. 12-17
[23] G. Ouyang, X. Ye and T. Nguyen, "Switching voltage regulator noise coupling to signal lines in a server system," 2010 IEEE International Symposium on Electromagnetic Compatibility, Fort Lauderdale, FL, USA, 2010, pp. 72-78
[24] Y. Chen, D. Lin and S. Chiu, "Modeling of High-frequency Switching Power Noise in Voltage Regulator Module," 2019 Electrical Design of Advanced Packaging and Systems (EDAPS), Kaohsiung, Taiwan, 2019, pp. 1-3