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研究生： 戴漢昇
Han-Sheng Dai
論文名稱： 直流脈衝電源磁控濺鍍二氧化矽絕緣膜及全濺鍍製程矽晶粒定位薄膜電晶體之開發
Pulsed DC Magnetron Sputter-Deposited Gate SiO2 and Location Control of Silicon Grain Thin Film Transistor by All Sputtering Process
指導教授： 葉文昌
Wen-chang Yeh
口試委員: 黃鶯聲
Ying-sheng Huang
張勝良
Sheng-lyang Jang
莊敏宏
Miin-horng Juang
學位類別： 碩士
Master
系所名稱： 電資學院 - 光電工程研究所
Graduate Institute of Electro-Optical Engineering
論文出版年： 2008
畢業學年度： 96
語文別： 中文
論文頁數： 75
中文關鍵詞： 脈衝直流反應性濺鍍 、閘極絕緣膜 、準分子雷射退火 、薄膜電晶體 、側向晶粒成長
外文關鍵詞： Pulsed DC reactive sputtering, Gate insulator, Excimer laser annealing(ELA), Thin film transistor(TFT), Lateral grain growth
相關次數： 點閱：332  下載：6 
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    • 本研究開發出全濺鍍鍍膜製程之矽晶粒定位薄膜電晶體，其中以室溫反應性脈衝直流磁控濺鍍法實現了7 MV/cm崩潰電場之氧化矽膜，利用退火後其固定電荷達1.95×1011 cm-2，介面陷阱密度為6.4×1011 cm-2eV-1。將此氧化矽應用在微透鏡陣列輔助矽膜晶粒定位技術之單晶粒薄膜電晶體，實現了移動率最佳值可達167 cm2/V-sec，ION/IOFF 電流比 > 105，臨限電壓為3.5V，次臨界擺幅為1.1 V/dec之電特性。

    In this paper, we develop the location control of silicon grain thin film transistor only by sputter-deposited process. We use the pulsed DC magnetron reactive sputtering to form silicon oxide whose breakdown field is as high as 7 MV/cm. After annealing in forming gas atmosphere, the oxide fixed charges are down to 1.95×1011 cm-2, and the interface state density is down to 6.4×1011 cm-2eV-1. The high quality gate insulator is applied for the thin film transistor, which is supported by the micro lens controlling the silicon grain location. The device has excellent characteristics which the mobility is 167 cm2/V-sec, ION/IOFF > 105, threshold voltage is 3.5V, and the subthreshold swing is 1.1V/dec.

    第一章 緒論 1-1 前言……………….……………………………… ﹝1﹞ 1-2 金氧半氧化層介紹.……………………………… ﹝2﹞ 1-3 反應性脈衝直流磁控濺鍍……………...……….. ﹝5﹞ 1-4 準分子雷射結晶技術……………………………. ﹝10﹞ 1-5 研究背景………….……………………………… ﹝14﹞ 1-6 論文流程………….……………………………… ﹝15﹞ 第二章 低溫濺鍍閘極絕緣膜之開發 2-1 前言……………….……………………………… ﹝16﹞ 2-2 研究方法…...…………………………………….. ﹝17﹞ 2-3 實驗結果與討論..……………………………….. ﹝20﹞ 2-3.1 沉積特性…...…………………………………….. ﹝20﹞ 2-3.2 電性分析…...…………………………………….. ﹝21﹞ 2-3.3 物性分析…...…………………………………….. ﹝29﹞ 2-4 本章結論………….……………………………… ﹝34﹞ 第三章 矽晶粒定位技術之開發 3-1 前言…………….………………………………… ﹝36﹞ 3-2 研究方法……….………………………………… ﹝36﹞ 3-3 實驗結果與討論……….………………………… ﹝41﹞ 3-3.1 微透鏡陣列製作結果分析…….………………… ﹝41﹞ 3-3.2 矽晶粒陣列定位結果分析…….………………… ﹝47﹞ 3-4 本章結論…….…………………………………… ﹝53﹞ 第四章 全濺鍍製程矽晶粒定位薄膜電晶體 4-1 前言…………….………………………………… ﹝54﹞ 4-2 研究方法……….………………………………… ﹝54﹞ 4-3 實驗結果與討論……….………………………… ﹝58﹞ 4-4 本章結論……….………………………………… ﹝67﹞ 第五章 結論…………………………………………………. ﹝68﹞ 參考文獻………………………………………………………. ﹝71﹞ 著作……………………………………………………………. ﹝75﹞

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