隨著再生能源發電的增加，導致電網在不同電壓和不同頻率時的控制複雜性增加。為了克服這些問題，使用固態變壓器 (SST) 有助於處理電力系統的靈活性和可靠性。本論文重點研究用於SST應用的三相四階飛馳電容式功率因數修正器的控制部分，以實現高性能、強健性和效率。研究和設計了三個主要控制主題：控制器設計、電網同步和多階調變方法。本文基於小信號模型，設計了傳統的PI控制器串級環控制，並透過模擬和實驗進行驗證。為了提高系統的性能，在外部電壓控制迴路中採用了基於觀測器的控制方法。基於觀測器的控制有以下幾個主要特點：確保直流輸出電壓的零穩態誤差，它提高了對輸出干擾的動態響應和系統強健性；只有一個控制參數用於調整比例控制器，便於實際工程師分析和設計。由於準確性和一致的同步機制對於併網應用至關重要，因此對於應用在不平衡電網條件下，性能優異的 DDSRF-PLL 可提高系統的整體性能。本文分析了 SVPWM、CBPWM 和 DPSPWM調變方法，在多階式轉換器應用鍾，CBPWM 比 SVPWM 更容易實現；而DPSPWM 結合了 CBPWM 和 SVPWM 的優點：控制簡單且電感電流漣波頻率為切換頻率之兩倍，同時達到飛馳電容上的自然電壓平衡。此外，DPSPWM通過動態相移載波，改善了PSPWM由於三相開關節點電壓不對齊引起的大電流漣波問題，使三相開關節點電壓中心對齊。在設計和測試原型機之前，採用PLECS 對所有設計和控制算法進行了數值模擬驗證，最後實際採用 DSP TMS320F28379D驗證了控制算法。

New energy generation and storage resources increase, leading to the complexity of the electrical network in terms of different voltages (DC and AC) with different frequencies. To overcome these problems, using a Solid State Transformer (SST) aided in dealing with the flexibility and reliability of the power system. This thesis focuses on the control part of three-phase four-level FCML PFC for SST application to achieve high performance, robustness, and efficiency. Three main control topics are studied and designed: controller design, grid synchronization, and multi-level PWM methods. The robust and efficient control of the PFC is crucial to regulate the constant output voltage and sinusoidal input current. Based on the small-signal model, the conventional cascade loop control with PI controllers is designed and verified in both simulation and experiment. The observer-based control is applied in the outer voltage control loop to enhance the system's performance. Several key features of observer-based control are listed as follows: it makes sure the zero steady-state error on DC output voltage; it improves the dynamic response and system robustness against the output disturbance; only one control parameter is used to tune the proportional controller; simple to analysis and design for practical engineers. Because grid synchronization is necessary for the operation of PFC, accuracy and consistent synchronization mechanism are crucial. Therefore, the DDSRF-PLL outperforming in unbalanced grid conditions improves the system's total performance. The PWM methods for two-level and multi-level converters are analyzed with SVPWM, CBPWM, and DPSPWM. CBPWM is more accessible to implement than SVPWM for multi-level converter applications. The DPSPWM combines both advantages of CBPWM and SVPWM: the simplicity and the increase of the inductor current ripple frequency two times while still keeping the natural voltage balancing on the flying capacitor. Furthermore, DPSPWM improves the high current ripple issue of PSPWM, caused by three-phase unaligned switching node voltages, by dynamic phase shift carrier wave to make the switching node voltage of three-phase are center aligned. All design and control algorithms are verified in numerical simulation by PLECS before designing and testing the hardware prototype. The implementation of the control algorithms on hardware is verified on high-performance DSP TMS320F28379D.

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