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研究生: 吳昱陞
Yu-Sheng Wu
論文名稱: 深度學習神經網路加速器快閃記憶體錯誤抗拒技術之研究
Error Resilience Techniques for Flash Memories of DNN Accelerators
指導教授: 呂學坤
Shyue-Kung Lu
口試委員: 王乃堅
Nai-Jian Wang
黃樹林
Shu-Lin Hwang
李進福
Jin-Fu Li
許鈞瓏
Chun-Lung Hsu
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 86
中文關鍵詞: 深度學習深度神經網路快閃記憶體容錯電路設計
外文關鍵詞: Deep Learning, Deep Neural Network, Flash Memory, Tolerance Digital Design
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  • 近年來,深度神經網路 (Deep Neural Network, DNN) 快速得發展,至今已應用在許多領域,例如智慧家電、人臉辨識與自動駕駛等等。深度神經網路模型透過大量的訓練資料,使正確率 (Accuracy) 達到一定標準,而訓練完成後會產生大量的權重資料 (Weight),這些權重資料必須被儲存下來。快閃記憶體為適合之儲存裝置來儲存這些權重資料,快閃記憶體為具有低功耗、可擴充性、高效能等優點的非揮發性記憶體,隨著製程發展,雖然快閃記憶體有較高的儲存密度與較低的成本,但同時也造成了可靠度 (Reliability) 與耐久度 (Endurance) 降低的問題。
    若是儲存之權重資料發生錯誤,在運算過程中將會產生誤差,導致正確率下降,因此本篇論文提出位址重映射容錯技術保護儲存於快閃記憶體之權重資料,本篇分析了權重資料之位元敏感度,定義出較重要之位元,並透過轉置電路將重要位元集中,本篇也提出位址重映射演算法進行重映射分析,透過位址重映射演算法將重要位元位址重映射至較安全位址,以提升深度神經網路模型之可靠度,使錯誤對正確率影響降低。
    本篇論文實現了位址重映射技術電路,並且以深度學習框架開發模擬器,模擬不同深度神經網路模型應用位址重映射技術之實驗,實驗結果顯示當位元錯誤率 (Bit Error Rate, BER) 達到 0.05 % 時,深度神經網路模型 VGG16 在無修復技術之正確率下降約 30 %,本篇提出之技術仍可維持深度神經網路模型之正確率下降在 1 % 之內,而本篇也分析位址重映射技術之硬體成本,實驗結果顯示本篇提出之位址重映射技術使用的額外硬體成本不超過 0.2 %。


    Deep Neural Network (DNN) has been widely used in smart appliances, face recognition and autonomous driving. After trained by training data, there will be large number of model weights. And weights data should be stored, flash memory can store large number of weights data. Flash memory is a non-volatile memory with the advantage of low power consumption, good scalability, and high performance. Due to the advance of process technology, the storage density of flash memory continues increase, but it also makes reliability and endurance decrease.
    If flash memory suffered from finite endurance that lead high bit error rate (BER) in stored data, the DNN model of recognition accuracy would be affected. In order to improve reliability of DNN model, this thesis proposed the address remapping technique to protect weights data stored in flash memory. We analyze bit significant of weights data when faults are injected into weights data. Based on the analysis, we find the significant bit of weights data and propose transposer. Weights data will be stored according to their significance. The address remapping technique will change address of transposed weight data that stored in faulty word, and remapping address to more reliable word address.
    The architecture of address remapping technique is also proposed. We used the deep learning framework for evaluating the accuracy of different DNN model. Experimental results show that based on 0.01 % BER in weights data, the DNN model of accuracy loss with proposed technique is less than 1 %. The hardware overhead for implementing technique is less than 0.2%.

    第一章 簡介 第二章 快閃記憶體之基本工作原理 第三章 深度學習基本原理 第四章 快閃記憶體之位址重映射技術 第五章 實驗結果 第六章 結論與未來展望。

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