使用功率循環原理來量測變動功率因數之逆變器半導體損耗

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研究生：	烏丹迪·塞瓦拉蘇 Uthandi Selvarsu
論文名稱：	使用功率循環原理來量測變動功率因數之逆變器半導體損耗 Inverter Semiconductor Losses Measurement for Variable Power Factor with Power Circulation Principle
指導教授：	邱煌仁 Huang-Jen Chiu
口試委員:	劉益華 Yi-Hua Liu 張佑丞 Yu-Chen Chang
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2021
畢業學年度：	109
語文別：	英文
論文頁數：	73
中文關鍵詞：	功率循環、背對背、半導體損耗分析、三階逆變器。
外文關鍵詞：	Power circulating, back to back, semiconductor loss analysis, three level inverter
相關次數：	點閱：331 下載：0
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上一筆

半導體元件的功率損耗對於切換式轉換器的效率和可靠度是有重要之關係。一般常用半導體元件之物理特性與數學計算來選擇與設計。然而，數學計算僅為理論與理想之條件而實際電路上的寄生元件與熱的效性其推算不可行。本論文提出一可於實際電路量測元件之條件下所得到之結果與評估之方法。本研究一種使用功率循環法之兩階與三階逆變器之損耗量測電路。透過能量循環量測所需要的損耗可大幅降低，量測電路時的損耗僅有功率損耗。控制架構基於同步參考將電流波形轉變成正弦波形。為驗證所提出之可行性，模擬並實作所提出之電路，分別實測交流電流 10 A 與 15 A 之兩階與三階電路。實際量測得到的半導體損耗與估算的進行比較以突顯所提出之可行性。

Power losses of semiconductors devices play a critical role on the efficiency and
reliability of switching converters. Typically, the evaluation and selection of semiconductor
devices during design phases are conducted by using mathematical estimation based on the
physical characteristic of such devices. However, mathematical estimation only assumes ideal
condition and the result can be unreliable due to circuit parasites and thermal effect on the
devices on the hardware circuit. This thesis provides a method of evaluating the power losses
based on measurement of the device on the test circuit with realistic operating condition. Two
and three levels inverter losses measurement circuit with power circulation method was
developed in this study. By using power circulation, the required power consumption for the
test is significantly reduced to be only the power loss of the device under test (DUT). A
controller structure based on synchronous reference frame was developed to shape the testing
current into sinusoidal waveform. To verify the performance of the presented method, a
simulation and experimental test on prototype circuit was conducted for up to 10A peak and
15A peak AC current for 2-level and 3-level test circuit respectively. Measured semiconductor
losses from the experimental hardware is compared with the one from estimation method to
emphasize the effectiveness of the presented method.

Contents
摘要 .........................................................................................................................................................i
Abstract..................................................................................................................................................ii
Acknowledgements ..............................................................................................................................iii
List of Figures....................................................................................................................................... vi
List of Tables........................................................................................................................................ix
List of Abbreviations ............................................................................................................................ x
Chapter Ⅰ: Introduction...................................................................................................................... 1
1.1 Background ............................................................................................................................... 1
1.2 Motivation and Goals ............................................................................................................... 2
1.3 Thesis Overview ........................................................................................................................ 2
Chapter Ⅱ: Transistor losses estimation for inverter circuit............................................................ 4
2.1. Two level inverter ................................................................................................................. 4
2.1.1 Conduction loss ...................................................................................................................... 6
2.1.2 Switching Losses..................................................................................................................... 9
2.2. Three level inverter............................................................................................................. 11
2.2.1 Conduction loss .................................................................................................................... 13
2.2.2 Switching loss ......................................................................................................................... 14
Chapter Ⅲ: Transistor losses measuring testbench...................................................................... 16
3.1. Hardware design ................................................................................................................. 17
3.1.1 Two level inverter ................................................................................................................ 17
3.1.2 Three level inverter.............................................................................................................. 18
3.2. DQ-frame based controller design..................................................................................... 18
3.3. PWM implementation......................................................................................................... 21
3.4. Dead time compensation..................................................................................................... 21
3.4.1 2L inverter ............................................................................................................................ 22
3.4.2 3L inverter ............................................................................................................................ 24
Chapter Ⅳ: Simulation and Experimental Results....................................................................... 26
4.1. Simulation results................................................................................................................ 26
4.1.1 2L inverter ............................................................................................................................ 26
4.1.2 3L inverter ............................................................................................................................ 30
4.2. Experimental results........................................................................................................... 33
v
4.2.1 2L inverter ............................................................................................................................ 33
4.2.2 3L inverter ............................................................................................................................ 43
Chapter Ⅴ: Conclusion and future work ........................................................................................ 56
5.1 Conclusion ............................................................................................................................... 56
5.2 Future works........................................................................................................................... 56
References............................................................................................................................................ 58
                                

References
[1] Infineon, "MOSFET Power Losses Calculation Using the Data-Sheet Parameters"
Application note, V 1. 1, July 2006.
[2] Y. Xiong, S. Sun, H. Jia, P. Shea and Z. John Shen, "New Physical Insights on Power
MOSFET Switching Losses," in IEEE Transactions on Power Electronics, vol. 24, no.
2, pp. 525-531, Feb. 2009, doi: 10.1109/TPEL.2008.2006567.
[3] VISHAY, “Power MOSFET Basics: Understanding Gate Chargeand Using it to Assess
Switching Performance” Device Application Note AN608A, Document Number: 73217,
Revision: February 2016.
[4] L. Aarniovuori, A. Kosonen, P. Sillanpää and M. Niemelä, "High-Power Solar Inverter
Efficiency Measurements by Calorimetric and Electric Methods," in IEEE Transactions
on Power Electronics, vol. 28, no. 6, pp. 2798-2805, June 2013, doi:
10.1109/TPEL.2012.2221166.
[5] H. Li, X. Li, Z. Zhang, J. Wang, L. Liu and S. Bala, "A simple calorimetric technique for
high-efficiency GaN inverter transistor loss measurement," 2017 IEEE 5th Workshop on
Wide Bandgap Power Devices and Applications (WiPDA), Albuquerque, NM, 2017, pp.
251-256, doi: 10.1109/WiPDA.2017.8170556.
[6] Y. Luo, L. Yang, J. Korhonen, W. Yu and I. Husain, "A Variable Power Factor High Power
Testbed for Traction Inverter Using Back-to-Back Connection," 2018 IEEE Energy
Conversion Congress and Exposition (ECCE), Portland, OR, 2018, pp. 4591-4598, doi:
10.1109/ECCE.2018.8557408.
[7] R. Prasad and G. Narayanan, "Proportional resonant controller based circulating power
setup for thermal testing of multilevel inverter," 2012 IEEE 7th International Conference
on Industrial and Information Systems (ICIIS), Chennai, 2012, pp. 1-6, doi:
10.1109/ICIInfS.2012.6304815.
[8] S. Hannan, S. Aslam and M. Ghayur, "Design and real-time implementation of SPWM
based inverter," 2018 International Conference on Engineering and Emerging
Technologies (ICEET), Lahore, 2018, pp. 1-6, doi: 10.1109/ICEET1.2018.8338637.
[9] X. Shi, Z. Wang, L. M. Tolbert and F. Wang, "A comparison of phase disposition and phase
shift PWM strategies for modular multilevel converters," 2013 IEEE Energy Conversion
Congress and Exposition, Denver, CO, 2013, pp. 4089-4096, doi:
10.1109/ECCE.2013.6647244.
[10] Tae-Jin Kim, Dae-Wook Kang, Yo-Han Lee and Dong-Seok Hyun, "The analysis of
conduction and switching losses in multi-level inverter system," 2001 IEEE 32nd Annual
Power Electronics Specialists Conference (IEEE Cat. No.01CH37230), Vancouver, BC,
2001, pp. 1363-1368 vol. 3, doi: 10.1109/PESC.2001.954310.
[11] SEMIKRON, “3L NPC & TNPC Topology” Application note, October 12 [Revision 05].
[12] S. Golestan, M. Monfared, J. M. Guerrero and M. Joorabian, "A D-Q synchronous frame
controller for single-phase inverters," 2011 2nd Power Electronics, Drive Systems and
59
Technologies Conference, Tehran, 2011, pp. 317-323, doi:
10.1109/PEDSTC.2011.5742439.
[13] W. Chen, B. Li, D. Xu and L. Cai, "A Dead-Time Compensation Method for Voltage
Source Inverters," 2019 22nd International Conference on Electrical Machines and
Systems (ICEMS), Harbin, China, 2019, pp. 1-6, doi: 10.1109/ICEMS.2019.8921871.
[14] ST, " MDmesh™ Power MOSFET," STW45NM60 datasheet, April 2007.
[15] Advanced Power Technology, “ULTRAFAST SOFT RECOVERY RECTIFIER DIODE,”
APT30D60BHBG datasheet, April 2005.

全文公開日期 2025/02/03 (校內網路)
全文公開日期 2026/02/03 (校外網路)
全文公開日期 2026/02/03 (國家圖書館：臺灣博碩士論文系統)

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