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研究生: 李乾耀
Cian-yao Li
論文名稱: 以FPGA嵌入式控制平台為基礎之數位控制器設計與實現
Design and Implementation of Digital Controllers Using FPGA-Based Embedded Control Platform
指導教授: 林紀穎
Chi-Ying Lin
口試委員: 姜嘉瑞
Chia-Jui Chiang
陳炤彰
Chao-Chang Chen
學位類別: 碩士
Master
系所名稱: 工程學院 - 機械工程系
Department of Mechanical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 110
中文關鍵詞: 數位控制器實現嵌入式控制系統FPGA壓電致動器追跡控制
外文關鍵詞: digital controller implementation, embedded control system, FPGA, piezoelectric actuator, tracking control
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本文主旨以現場可規劃邏輯陣列(FPGA) 作為發展嵌入式控制系統主要的硬體核心; 以壓電致動器系統為例, 探討進階數位控制器實現的諸多議題。其內容包含了非以系統數學模型設計(Non-Model-based design)PID 控制器與類神經網路(Neural Network)控制器, 以及系統數學模型為基礎設計(Model-based design)之反覆控制器(Repetitive Control) 。有關反覆控制器設計所需的數學模型,
本文在10 kHz及100 kHz的取樣頻率下, 以最小平方模型(Auto eRegressive eXogeneous)進行系統鑑別以供控制器設計。此外本研究也針對壓電致動器的磁滯現象加以建模並進行補償, 以提升精密控制定位效能。在嵌入式系統FPGA 晶片的數位控制器實現方面, 硬體採用美商國家儀器(National Instruments)所生產CompactRIO(cRIO) 嵌入式硬體, 其內部由Real-Time Module 、FPGA Module
以及DAQ Module 所構成; 相關韌體撰寫則以LabVIEW 軟體作為溝通與控制器開發介面。其開發內容包括數值運算分析、程式優化及演算函式轉為電路型式實現方法等; 除此之外, 本文並探討FPGA 晶片內部邏輯電路實現高等數位控制演算法需探討之特性; 例如定點數運算、有限精度運算以及溢位等。藉由上述分析與討論, 本研究成功地實現類神經網路與反覆控制於所選用之嵌入式控制系統, 並獲得比傳統PID 控制器更好的壓電致動器追跡控制效能。


This thesis aims to develop necessary techniques in an embedded control system by using the FPGA based platform. The study takes piezoelectric actuator as a control system example and investigates several issues for digital controller implementation. The applied controls include non model based design such as PID control and neural network control. Moreover, repetitive control, a model based design approach, is also implemented on the piezo actuated system for periodic signal tracking at 10 kHz and 100 kHz sampling rate, respectively. The mathematical model for repetitive controller design is obtained by using Auto-Regressive eXogenous (ARX) algorithm, a system identification technique, for the repetitive controller design. To compensate for the hysteresis effect in the piezo actuated system, an inverse hysteretic compensator is also applied to further improve the tracking performance. The digital control algorithms were realized using embedded hardware CompactRIO developed by National Instruments. The controller includes Real Time module, FPGA module, and DAQ module. We specifically develop the controller firmware under an FPGA environment using LabVIEW software language and obtain extreme fast sampling rate and better control performance than similar works in the literature. Because the FPGA controller is a fixed point processor, design issues such as finite word length precision, overflow, and program optimization should be carefully considered. After performing fixed point analysis, this research successfully implements the advanced controllers on the selected embedded control system. The experimental results also demonstrate that the applied neural network control and repetitive control achieve better control performance than traditional PID control.

摘要 I Abstract II 致謝 IV 目錄 V 圖目錄 VIII 表目錄 XI 1 緒論 1 1.1 研究動機. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1.2 文獻回顧. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 研究目的. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 本文貢獻. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.5 本文架構. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 硬體架設7 2.1 壓電致動器系統. . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.2 FPGA晶片設計與構成. . . . . . . . . . . . . . . . . . . . . . . 12 3 數位控制器實現探討13 3.1 數位訊號量化誤差. . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.2 數值運算分析. . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.3 控制器靜態參數設計. . . . . . . . . . . . . . . . . . . . . . . . 18 4 數位控制器設計20 4.1 PID控制器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 類神經網路. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.2.1 倒傳遞類神經網路. . . . . . . . . . . . . . . . . . . . . 22 4.2.2 輻狀基底函數類神經網路. . . . . . . . . . . . . . . . . . 26 4.2.3 以FPGA 環境實現神經元. . . . . . . . . . . . . . . . . 28 4.3 反覆控制器. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.4 壓電致動器磁滯效應補償. . . . . . . . . . . . . . . . . . . . . . 37 5 系統鑑別40 5.1 系統鑑別簡介. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 5.2 系統鑑別結果. . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 5.3 系統鑑別輸入訊號程式設計. . . . . . . . . . . . . . . . . . . . . 46 6 模擬與實驗結果49 6.1 訊號處理演算式精度模擬與分析. . . . . . . . . . . . . . . . . . 50 6.2 人機控制介面設計. . . . . . . . . . . . . . . . . . . . . . . . . . 55 6.3 軌跡追蹤實驗結果. . . . . . . . . . . . . . . . . . . . . . . . . . 56 6.3.1 PID控制器實驗結果. . . . . . . . . . . . . . . . . . . . 56 6.3.2 類神經網路控制器實驗結果. . . . . . . . . . . . . . . . 57 6.3.3 反覆控制器實驗結果. . . . . . . . . . . . . . . . . . . . 58 6.3.4 反覆控制器結合磁滯補償實驗結果. . . . . . . . . . . . . 62 6.3.5 實驗結果分析. . . . . . . . . . . . . . . . . . . . . . . . 65 6.4 控制器強健性分析. . . . . . . . . . . . . . . . . . . . . . . . . . 69 6.5 高取樣率實驗結果. . . . . . . . . . . . . . . . . . . . . . . . . . 74 6.6 有限精度演算分析. . . . . . . . . . . . . . . . . . . . . . . . . . 79 7 結論與未來發展 80 參考文獻 82 附錄 86

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