近年來，碳化矽(SiC)被廣泛研究使用，而隨著功率元件的蓬勃發展，將碳化矽用來作為功率元件的材料之研究也越來越多，因此本論文即是在探討用碳化矽來當作材料之功率電晶體之研究。
此研究目的就是致力於製作一個在擁有高耐壓能力時也能通過大電流的SiC MOSFET，我們提出一種在SiC MOSFET中埋入一層p型層的結構，藉此提高元件的耐壓能力。而為了近一步提升元件導狀態下的導通電流且使耐壓能力維持在我所設的目標值：1100 V，我們將元件加厚的同時持續將漂移區濃度下降，結果發現這樣的改變能大幅提升元件的導通能力。在導通狀態下，閘極偏壓15伏和汲極偏壓3伏時，電流成長了百分之三十。

In recent years, silicon carbide (SiC) is widely researched and used, and with the vigorous development of power device, there are more and more research on the use of silicon carbide as a material for power device. The purpose of this research is to form a thin-film SiC MOSFET that shows a small on-state voltage drop with excellent blocking characteristics. We propose a structure in which a p-type layer is buried in silicon carbide MOSFET, which show a higher blocking voltage than the structure without adding a p-type layer. In order to improve the on-state characteristics of the device, the film thickness is increased. Furthermore, the degraded breakdown voltage, due to the increased film thickness, may be improved by simultaneously lowering the doping concentration of drift region. As a result, this device can cause an improvement more than 30% of the on-state current than the conventional SiC device, at a gate bias of 15 V and a drain bias of 3 V and for a blocking voltage of 1100 V.

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