簡易檢索 / 詳目顯示

研究生: 沈誦修
Sung-Shiou Shen
論文名稱: 晶片卡與微處理機安全模組之側通道洩漏防制研究
Side-Channel Leakage Prevention Schemes of Smart Card or Microprocessor Based Security Module
指導教授: 邱榮輝
Jung-Hui Chiu
李三良
San-Liang Lee
口試委員: 雷欽隆
Chin-Laung Lei
羅有綱
Yu-Kang Lo
顏嵩銘
Sung-Ming Yen
何煒華
Wei-Hua He
學位類別: 博士
Doctor
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 英文
論文頁數: 196
中文關鍵詞: 差分電力攻擊電磁波洩漏攻擊時間分析攻擊統計分析攻擊晶片卡密碼模組
外文關鍵詞: Differential Power Analysis, Timing Analysis Attack, Smart Card, Security Module
相關次數: 點閱:217下載:5
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 現今,使用者常利用晶片卡或內含微處理機的密碼模組來保護個人資料。這些硬體密碼模組之保護電路會因廠商的設計或實作疏忽,而造成密碼模組安全性有漏洞而不知。既使廠商宣稱其模組電路有足夠的安全性,但這也無從保證,其電路不會因設計疏忽或新的攻擊技術而被破解。在這種情形之下,必須有一定方式要求工程師在設計或測試電路時,遵循較具安全性之設計原則,以提升模組電路的安全性。就攻擊者而言,他們也會不斷嘗試尋找模組電路的弱點,藉以攻擊破壞模組的安全性,這種抗爭是永無停息。
    論文主要針對嚴重影響資訊安全的側通路洩漏攻擊密碼模組技術,特別是與電力相關的攻擊技術,例如電力消耗曲線攻擊、電磁輻射分析攻擊等,提出三種防禦電力式側通路洩漏攻擊之方案。
    1. 以平衡電路設計搭配雜訊覆蓋之防禦電力攻擊方案:此平衡式電路將被整合進密碼模組內,以平衡密碼模組電力消耗,降低經由電力消耗而洩漏之訊號值,再加上雜訊覆蓋,以增加攻擊者的困難度。
    2.光耦合電路設計之防禦電力攻擊方案:另一保護側通路洩漏攻擊密碼模組之方法,是利用光耦合電路設計。利用光耦合觀念,可以將提供密碼模組能量的電源線改成光線,使得該密碼模組無外接電源線,徹底消除電力攻擊可能。此種方法也將降低電磁輻射,與隔離模組內部訊號經電磁耦合,藉由匯流排洩漏的可能性。
    3.密碼器時變金鑰設計之防禦電力攻擊方案:傳統區塊密碼器(block cipher)之金鑰都是固定的。這讓DPA攻擊者能夠收集到,在相同金鑰下足夠之電力消耗曲線,而能以較高機率分析攻擊。本論文所提之時變金鑰設計,因具有一直在改變之金鑰,讓DPA攻擊者無法收集到相同金鑰下之足夠電力消耗曲線,而無法做統計分析,而達到防禦電力攻擊目的


    Smart card or microprocessor based security modules are used today to keep user secret of information confidential. However, some chip manufacturers do not pay enough attention to the proper design and testing of security mechanisms. Even where they claim their products are highly secure, they do not guarantee this and do not take any responsibility if a device is compromised. In this situation, it is crucial for the design engineer to have a convenient and reliable method of testing the security of chips. By comparison, hackers constantly try to break through implemented protections using the vulnerabilities of the design, consequently a continuous battle is waged between manufacturers and hacker community.
    This thesis investigates a field of information security that is of growing importance: the prevention of side-channel cryptanalysis of security modules. Specifically, it focuses on the prevention of power analysis attacks which include the information leakages from power consumption and electromagnetic radiation. A theoretical background is presented, followed by experiments that show practical implementations of power analysis attacks.
    The main contribution of the thesis includes three prevention schemes that are proposed to reduce the risks from side-channel leakage as follows:
    1. Balanced Circuits with Noise Masking Prevention Scheme: Balance circuits as one of countermeasures, is designed to balance the power consumption of the security module and the adding of a masking noise to hide the balance signal. Normally, power lines are necessary for every electronics module that makes the power analysis attack possible.
    2. Photo-coupling Prevention Scheme: Adopting photo-coupling techniques using LED with photovoltaic cells and photo-couplers to isolate the power lines of the system. Moreover, information leakages from conduction lines including the power lines of smart cards, I/O bus, and clock lines can be prevented. In addition, radiation leakages can also be reduced using embedded metal plates.
    3. Time-Varying Key Prevention Scheme: The conventional block ciphers use a fixed encryption key. This makes a DPA attack high possibility. The proposed authenticated encryption scheme using a time-varying key can overcome such drawback to prevent the side channel power analysis.

    Abstract I Background and Previous Research 1 Background and Motivation. . . . . . . . . . . . . . . . . . .. . . . . .. . . . . . . 3 1.1 Previous work and Background . . . . . . . . . . . . . . . . . . . . 4 1.2 The subject of hardware security . . . . . . . . . . . . . . . . . . 5 1.3 Motivation and overview . . . . . . . . . . . . . . . . .. . . . . 6 2 Side-Channel Cryptanalysis . . . . . . . . . . .. . . . . . . . . . . .. . . . . . . 7 2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Timing Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.3 Differential Fault Analysis . . . . . . . . . . . . . . . . . . . . . . .10 2.4 Electromagnetic Analysis . . . . . . . . . . . . . . . . . . . . . . . . 12 2.5 Power Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 2.5.1 SPA and DPA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 2.5.2 High Order DPA . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5.3 Summary of Power Analysis . . . . . . . . . . . . . . . . . . . . . . .19 2.6 Summary of Side-Channel Attacks . . . . . . . . . . . . . . . . . . . .. 20 3 Smart Cards 21 3.1 Technical Background . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.2 Smart Card’s Applications . . . . . . . . . . . . . . . . . . . . . . . 26 II Experiments 27 4 Simple Power Analysis and Differential Power Analysis 29 4.1 Aim . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 4.2 Background - The DES Algorithm . . . . . . . . . . . . . . . . . . . ....31 4.3 Data Acquisition Method . . . . . . . . . . . . . . . . . . . . . . . 35 4.3.1 Equipment Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 4.3.2 DES Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.3.3 Data Acquisition Phase . . . . . . . . . . . . . . . . . . . . . . . . 41 4.3.4 Data Analysis Phase . . . . . . . . . . . . . . . . . . . . . . . . . .47 4.4 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .......48 5 Noise Reduction . . . . . . . . . . . . . . . . . . . . . . . . . . .......49 5.1 Aim . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...49 5.2 Noise Reduction Method . . . . . . . . . . . . . . . . . . . . . . . . . 50 5.3 Results of Noise Reduction. . . . . . . . . . . . . . . . . . . . . . . .55 5.4 Improving the Attack . . . . . . . . . . . . . . . . . . . . . . . . . . 56 5.5 Results of Attacks on DES . . . . . . . . . . . . . . . . . . . . . . . .59 III Proposed Countermeasure Schemes 61 6 Balanced Circuits with Noise Masking. . . . . . . . . . . . . . . . . . . .63 6.1 Introduction to Current Countermeasure of Power Analysis Attack. . .....64 6.2 Balanced Circuits with Noise Masking Phases . . . . . . . . . . . . . . .65 6.2.1 Current Countermeasure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65 6.2.2 Balanced Circuits. . . . . . . . . . . . . . . . . . . . . . . . . . . 66 6.2.3 Balanced Circuits with Noise Masking . . . . . . . . . . . . . . ......70 6.3 Results of Balanced Circuits with Noise Masking . . . . . . . . . . .....72 7 Photo-coupling Prevention Scheme . . . . . . . . . . . . . . . . . . . . .73 7.1 Introduction to Optical Prevention Mechanisms. . . . . . . . . . . . . ..74 7.2 Optical Prevention Mechanisms . . . . . . . . . . . . . . . . . . . . . .76 7.2.1 Photovoltaic Cell and Photo-coupling . . . . . . . . . . . . . . . . . 76 7.2.2 Structure of Optical Prevention Mechanisms . . . . . . . . . . . . . . 79 7.2.2.1 Structure of Countermeasure for Electromagnetic Wave Leakage 81 7.2.2.2 Structure of Countermeasure for Bus Leakage 83 7.3 Simulation Experiment. . . . . . . . . . . . . . . . . . . . . . . . . . 85 7.4 Results of Optical Prevention Mechanisms . . . . . . . . . . . . . . . . 89 8 Time-Varying Key Prevention Scheme . . . . . . . . . . . . . . . . . . . . 91 8.1 Introduction to Time-Varying Key. . . . . . . . . . . . . . . . . . . . .92 8.2 Time-Varying Key Block Cipher Model . . . . . . . . . . . . . . . . . . .97 8.2.1 Scheme of TVK Mode of Operation 97 8.3 The Algorithm of the Time-Varying Key Block Cipher Model. . . . . . . ...98 8.4 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101 IV. Future Work and Conclusion 105 9 Other Issues to be Studied . . . . . . . . . . . . . . . . . . . . . . . .107 9.1 Balanced circuit embedded into RFID tag immunity against DPA 108 9.2 Simplify Time-Varying Key scheme for RFID tag. . . . . . . . . . . . . .110 9.3 Photo-coupling combining with detection circuit to detect invasion 111 10 Conclusions 113 Reference 115 Appendix A Source Code Listing 121 A.1 DES Algorithm Implementation on Microcontroller. . . . . . . . . . . . 121 A.2 Acquisition Software: The GUI program of DPA . . . . . . . . . .. . . . 128 A.3 DPA Experiment GUI Interface. . . . . . . . . . . . . . . . . . . . . . 153 B Noise Reduction 179

    [1] E. Biham and A. Shamir, “Differential Cryptanalysis of the Data Encryption Standard,” Springer-Verlag Publication, ISBN 0387979301, 1993.
    [2] E. Biham and A. Shamir, “Differential Cryptanalysis of the Full 16-Round DES,” Advances in Cryptology - CRYPTO '92: 12th Annual International Cryptology Conference, Proceedings, Lecture Notes in Computer Science, Vol. 740, pp. 488-497, 1993.
    [3] E. Biham and A. Shamir, “Differential Cryptanalysis of DES-like Cryptosystems,” Journal of Cryptology, Vol. 4, No. 1, pp. 2-21, Jan. 1991.
    [4] E. Biham, O. Dunkelman, and N. Keller, “Enhancing Differential-Linear Cryptanalysis,” Advances in Cryptology - ASIACRYPT 2002: 8th International Conference on the Theory and Application of Cryptology and Information Security, Proceedings, Lecture Notes in Computer Science, Vol. 2501, pp. 254-266, 2002.
    [5] P. Kocher, J. Jaffe, and B. Jun, “Introduction to Differential Power Analysis and Related Attacks,” Technique Report by Cryptography Research, 1998, also available from http://www.cryptography.com/dpa/technical/.
    [6] P. Kocher, J. Jaffe, and B. Jun, “Differential Power Analysis,” CRYPTO’99: 19th Annual International Cryptology Conference, Santa Barbara, CA USA, vol. 1666, pp. 388–397, Aug. 1999.
    [7] J. J. Quisquater and D. Samyde, “Electromagnetic Analysis (EMA): Measures and Countermeasures for Smart Cards,” Esmart 2001, LNCS 2140, Springer-Verlag, pp. 200-210, 2001.
    [8] A. Matthews, “Low Cost Attacks on Smart Cards: The Electromagnetic Side-Channel,” Next Generation Security Software Ltd, September 2006, http://www.ngssoftware.com/research/papers/EMA.pdf
    [9] J. J. Quisquater and D. Samyde, “Side Channel Cryptanalysis,” Securite des Communications sur Internet- SECI02, pp. 179-184, Sep. 2002.
    [10] J. F. Dhem, F. Koeune, P. A. Lerous, P. Mestré, J. J. Quisquater, and J. L. Willems, “A Practical Implementation of the Timing Attack,” Universite catholique de Louvain, Technical Report CG-1998/1, 1998, also available in http://www.dice.ucl.ac.be/crypto.
    [11] P. Kocker, “Timing Attacks on Implementations of Diffie-Hellman, RSA, DSS, and Other Systems,” CRYPTO ’96: 16th Annual International Cryptology Conference, Santa Barbara, CA USA, vol. 1109, pp.104-, Aug. 1996.
    [12] M. L. Akkar, R. Bevan, P. Dischamp, and D. Moyart, “ Power Analysis, What Is Now Possible,” Proc. Sixth Int’l Conf. the Theory and Application of Cryptology and Information Security, Advance in Cryptology (ASIACRYPT 2000), pp. 489-502, 2000.
    [13] C. Clavier, J. S. Coron, and N. Dabbous, “Differential Power Analysis in The Presence of Hardware Countermeasures,” Proc. Second Int’l Workshop Cryptographic Hardware and Embedded Systems (CHES 2000), pp. 252-263, 2000.
    [14] J. S. Coron and L. Goubin, “On Boolean and Arithmetic Masking Against Differential Power Analysis.” In Cryptographic Hardware and Embedded Systems − CHES 2000, vol. 1965 of Lecture Notes in Computer Science, pp. 231–237. Springer-Verlag, 2000.
    [15] T. S. Messerges, “Using Second-Order Power Analysis to Attack DPA Resistant Software,” In Cryptographic Hardware and Embedded Systems − CHES 2000, vol. 1965 of Lecture Notes in Computer Science, pp. 238–251. Springer-Verlag, 2000.
    [16]. E. Biham and A. Shamir, “Differential Fault Analysis of Secret Key Cryptosystems,” Lecture Notes of Computer Science 1294, Proceedings of CRYPTO'97, Springer, pp. 513-525.
    [17] D. Boneh, R. A. DeMillo, and R. J. Lipton, “On the Importance of Checking Cryptographic Protocols for Faults,” Lecture Notes of Computer Science 1233, Proceedings of EUROCRYPT'97, Springer, pp. 37-51.
    [18] T. S. Messerges, E. A. Dabbish, and R. H. Sloan, “Investigations of Power Analysis Attacks on Smartcards,” Proceedings of USENIX Workshop on Smartcard Technology, May 1999, 151–161.
    [19] J. A. Muir, “Techniques of side channel cryptanalysis,” Master’s Thesis, University of Waterloo, 2001.
    [20] A. Shamir, “Protecting Smart Cards from Passive Analysis with Detached Power Supplies,” Proceedings of CHES 2000, Springer-Verlag, 2000, pp. 71-77.
    [21] O. Billet and M. Joye, “The Jacobi Model of an Elliptic Curve and Side-Channel Analysis,” AAECC 2003, LNCS 2643, Springer-Verlag, 2003, pp. 34-42.
    [22] C. H. Gebotys and R. J. Gebotys, “Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor,” CHES 2002, LNCS 2523, Springer-Verlag, 2003, pp. 114-128.
    [23] FIPS PUB 140-2, Security Requirements for Cryptographic Modules, Federal Information Processing Standards Publication, May 25, 2001.
    [24] Common Criteria for information technology security Evaluation (CC 2.1), Common Criterion, CCIMB-99-031
    [25] D. Noneh, R. A. Demillo, and R.J. Lipton, “On the Importance of Checking Cryptographic Protocols for Fault,” Proceedings of EUROCRYPTO ’97, Lecture Notes in Computer Science, vol. 1233, Springer-Verlag, 1997, pp. 37-51.
    [26] O. Billet and M. Joye, “The Jacobi Model of an Elliptic Curve and Side-Channel Analysis,” AAECC 2003, LNCS 2643, Springer-Verlag, 2003, pp. 34-42.
    [27] C. H. Gebotys and R. J. Gebotys, “Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor,” CHES 2002, LNCS 2523, Springer-Verlag, 2003, pp. 114-128.
    [28] NSA, “NSA TEMPEST Documents,” http://www.cryptome.org/nsa- tempest.htm.
    [29] D. Agrawal, B. Archambeault, J. R. Rao, and P. Rohatgi, “The EM Side-Channel(s): Attacks and Assessment Methodologies,” Cryptographic Hardware and Embedded Systems, CHES 2002, vol. 2523, Springer-Verlag , pp. 29–45, 2002.
    [30] D. Agrawal, B. Archambeault, S. Chari, J. R. Rao, and P. Rohatgi, “Advances in Side-Channel Cryptanalysis,” RSA Laboratories Cryptobytes, vol. 6, no. 1, pp. 20–32, Spring 2003.
    [31] K. Gandolfi, C. Mourtel, and F. Olivier, “Electromagnetic Aanalysis: Concrete results,” Cryptographic Hardware and Embedded Systems, CHES 2001, vol. 2162, Springer-Verlag, pp. 251–261, 2001.
    [32] S. P. Skorobogatov and R. J. Anderson, “Optical Fault Induction Attacks,” Cryptographic Hardware and Embedded Systems, CHES 2002, LNCS 2523, Springer-Verlag, pp. 2-12, 2003.
    [33] S. Silvestre, L. Sentis, and L. Castaner, “A Fast Low-Cost Solar Cell Spectral Response Measurement System with Accuracy Indicator,” IEEE Trans. Instrum. Meas., vol. 48, pp. 944-948, Oct, 1999.
    [34] Wikipedia, http://en.wikipedia.org/wiki/Main_Page.
    [35] M.A. Green, J. Zhao, A. Wang, and S.R. Wenham, “Very High Efficiency Silicon Solar Cells-Science and Technology,” IEEE Transactions on Electron Devices, Volume 46, Issue 10, pp. 1940 – 1947, Oct. 1999.
    [36] “About the Reference AM 1.5 Spectra” American Society for Testing and Materials (ASTM) Terrestrial Reference Spectra for Photovoltaic Performance Evaluation. http://rredc.nrel.gov/solar/spectra/am1.5/
    [37] H. Field, “Solar Cell Spectral Response Measurement Errors Related to Spectral Band Width and Chopped Light Waveform,” The 26th IEEE Photovoltaic Specialists Conference, September 29, October 3, 1997, Anaheim, California.
    [38] “ISO/IEC 7816 part3: Identification Cards -- Integrated Circuit Cards -- Part 3: Cards with Contacts -- Electrical Interface and Transmission Protocols,” International Organization for Standardization, http://www.iso.org/iso/en/ISOOnline.frontpage
    [39] “HSDL-4261: High-Power T-1 3/4 (5mm) AlGaAs infrared (870nm) Lamp,” http://www.avagotech.com/search/results.jsp
    [40] R. J. Jensen, M. A. Mitchell, S. L. Palmquist, A. J. Toth, and R. G. Nichols, “ Double-Sided Ceramic MCMs for Spaceborne Computer Applications,” IEEE 1997 International Conference on Multichip Modules, pp. 315-322, 1997.
    [41] M.A. Elgamel and M.A. Bayoumi, “Minimum-Area Shield Insertion for Explicit Inductive Noise Reduction,” Proc. 16th Symposium on Integrated Circuits and Systems Design, vol. SBCCI 2003, pp. 256–260, Sep, 2003.
    [42] T. Schaffer, A. Glaser, and P.D. Franzon, “Chip-Package Co-implementation of A Triple DES Processor,” IEEE Trans. Advanced packaging, vol. 27, pp. 194-202, Feb. 2004.
    [43] David K. Cheng, Field and Wave Electromagnetics, Addison-Wesley Publishing Company, ISBN 0-201-01239-1, 1983.
    [44] S. P. Skorobogatov, “Semi-invasive attacks: A New Approach to Hardware Security Analysis,” Technical Report, UCAM-CL-TR-630/ISSN 1476-2986, Computer Laboratory of University of Cambridge.
    http://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-630.pdf
    [45] M. Bellare and C. Namprempre, “Authenticated Encryption: Relations Among Notions and Analysis of The Generic Composition Paradigm,” Proceedings Advances in Cryptology - ASIACRYPT 2000, Lecture Notes in Computer Science, Vol. 1976/2000, pp.531-550, 2000.
    [46] D. Whiting, R. Housley, and N. Ferguson, “Counter with CBC-MAC: AES Mode of Operation,” Proposal submitted to NIST for Authenticated Encryption Modes, Work in Progress, June, 2003.
    http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/ccm/ccm.pdf.
    [47] P. Rogaway, M. Bellare, J. Black, and T. Krovetz, “OCB: A Block-Cipher Mode of Operation for Efficient Authenticated Encryption,” In Proceedings of the 8th ACM Conference on Computer and Communications Security, pp 196-205. Aug. 16, 2001.
    [48] B. Gladman, “AES and Combined Encryption/Authentication Modes,” 2003.
    http://fp.gladman.plus.com/AES/index.htm.
    [49] M. Bellare, P. Rogaway, and D. Wagner, “A Conventional Authenticated-Encryption Mode,” Proposal submitted to NIST for Authenticated Encryption Modes, Work in Progress, April, 2003.
    http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/eax/eaxspec. Pdf
    [50] T. Kohno, J. Viega, and D. Whiting, “CWC: A High-Performance Conventional Authenticated Encryption Mode,” http://eprint.iacr.org/2003/106/.
    [51] T. Kohno, J. Viega, and D. Whiting, “CWC: A High-Performance Conventional Authenticated Encryption Mode,” Lecture Notes in Computer Science, Springer Berlin / Heidelberg, vol. 3017, pp. 408-426, 2004
    [52] D. A. McGrew and J. Viega, “The Use of Galois/Counter Mode (GCM) in IPsec ESP," Proposal submitted to NIST for Authenticated Encryption Modes, Work in Progress, October, 2004.
    http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/gcm/gcmspec. pdf
    [53] D. A. McGrew and J. Viega, “The Galois/Counter Mode of operation (GCM),” http://csrc.nist.gov/CryptoToolkit/modes/proposedmodes/gcm/gcm-spec.pdf.
    [54] J. Daemen and V. Rijmen, “AES proposal: Rijndael,"
    http://www.esat.kuleuven.ac.be/ rijmen/rijndael/rijndaeldocV2.zip
    [55] E. Oswald, S. Mangard and N. Pramstaller, “Secure and Efficient Masking of AES – A Mission Impossible?” Technical Report of SCA-Lab. Of IAIK.
    http:// www.iaik.tu-graz.ac.at/research/sca-lab/index.php.
    [56] B. S. Kaliski Jr., C. K. Koc, and C. Paar, Eds., “Multiplicative Masking and Power Analysis,” Cryptographic Hardware and Embedded System (CHES 2002), Lecture Notes in Computer Science, Springer-Verlag, vol. 2523, pp. 198-212, 2003.
    [57] M. L. Akkar and C. Giraud, “ An Implementation of DES and AES, Secure Against Some Attacks,” Cryptographic Hardware and Embedded System (CHES 2001), Lecture Notes in Computer Science, Springer-Verlag, vol. 2162, pp. 309-318, 2001.
    [58] Shen, S. S. and Chiu, J. H., “A Leakage Reduction Via Balanced Circuit and Masking Noise Design Against The Differential Power Analysis,” Journal of the Chinese Institute of Engineers, Vol. 29, No. 6, pp. 1119-1122, 2006
    [59] Shen, S. S. and Chiu, J. H., “Prevention of Information Leakage by Photo-coupling in Smart Card,” accepted by IEICE Transactions on Special Issue of Cryptography and Information Security.
    [60] Y. Oren and A. Shamir, “Power Analysis of RFID Tags,” http://www.wisdom.weizmann.ac.il/~yossio/rfid
    [61] William Stallings, Cryptography and Network Security Principles and Practices, Prentice Hall, ISBN 0-13-111502-2, New Jersey 07458, U. S. A.

    QR CODE