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研究生: 張庭卉
Ting-Hui Chang
論文名稱: 音訊應用等效11.75位元之改良強健式MASH-21三角積分類比數位轉換器
A 11.75-bit Modified Sturdy MASH-21 Delta-Sigma AD Converter for audio application
指導教授: 姚嘉瑜
Chia-Yu Yao
口試委員: 陳筱青
Hsiao-Chin Chen
彭盛裕
Sheng-Yu Peng
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2019
畢業學年度: 107
語文別: 中文
論文頁數: 119
中文關鍵詞: 三角積分調變器切換式電容積分器多級雜訊移頻
外文關鍵詞: Sturdy-MASH, Switch-Capacitor Integrator, Multi-Stage
相關次數: 點閱:315下載:0
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現今生活中,資料轉換器無所不在,其中,音訊應用之類比/數位轉換器更是貼近於我們的生活。一般常見的CD為高音質音訊標準之一,其規格被訂定為:取樣頻率44.1 KHz/16 bit。隨著電影與音樂產業的興盛,應用於音訊方面的類比/數位轉換器也一直扮演著重要的角色。這之中,如何使產品能達到越高的解析度、低功耗,且高線性度,甚至能運用至更廣泛的訊號頻寬,都是類比/數位轉換器其具挑戰性的研究目標。
本篇論文設計一個應用於CD音質,低電壓與低功耗的三角積分調變之類比/數位轉換器。系統將Sturdy-MASH的架構做進一步的修改,並稱之為Modified Sturdy-MASH (即MSMASH),其中以全差動對稱來完成整個系統,進一步實現一個高線性度、三階的MSMASH-21。晶片使用TSMC 0.18 um製程,晶片面積〖1.68 mm〗^2,操作電壓1 V,取樣頻率5.9976 MHz,OSR為136;系統頻寬22.05 kHz,解析度達到11.75 bit,功率消耗為2.58 mW。


CD audio, which is sampled using 44.1kHz sampling rate and each sample has 16 bits, is a hight-quality standard in audio applications. With a great demand on movies and musics , the analog-to-digital converter(ADC)that generates CD-quality digital signal plays an important role in these markets .Therefore, it is a challenging issue to make a low-cost ADC product with low power consumption , high resolution , and high linearity recording identity .
This paper implemeted a system of modified sturdy MASH-21 delta-sigma modulator with 11.63-bit resolution. We modified the sturdy-MASH architecture by employing both inverting and non-inverting integrators. We use the fully-differential opamp as the amplifier in the switch-capacitor integrator. The chip was fabricated in TSMC 0.18 um CMOS process. The chip area is 1.68mm2. The operating voltage is set at 1 volt. The sampling frequency is 5.9976 MHz with over-sampling as 136 and the system bandwidth is 22.05 kHz. The power consumption of the proposed delta-digma modulator is 2.743mW.

致謝 I 摘要 II Abstract III 目錄 IV 圖目錄 VI 表目錄 XI 第一章 1 概論 1 第二章 3 超取樣三角積分調變器介紹 3 2.1簡介 3 2.2 奈奎斯特取樣定理 4 2.3 量化誤差 5 2.4 超取樣技術 7 2.5 雜訊移頻 9 2.6 一階三角積分調變器 11 2.7 二階與多階三角積分調變器 13 2.8多種架構介紹 15 第三章 22 系統與電路架構 22 3.1 Modified Sturdy-MASH-21架構 22 第四章 39 電路設計與模擬結果 39 4.1 類比電路實現 39 4.2 子電路設計 44 4.3 系統之前模擬結果(Pre-simulation) 59 4.4 晶片佈局 66 4.5 系統佈局後模擬結果(Post-simulation) 67 第五章 73 量測結果 73 5.1 量測設定 73 5.2 量測結果 78 5.3 量測檢討 94 5.4 文獻比較 95 第六章 96 結論與未來展望 96 參考文獻 97

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