本論文設計了一種加密演算法，演算法的金鑰基於渾沌系統產生。為此我們提出了一個四維的渾沌系統，並討論了渾沌系統在不同程式語言編譯的差異，之後以相圖分析與李亞普諾夫指數對渾沌系統的特性進行驗證。經驗證後，我們以尤拉方法取得渾沌系統的離散時間訊號。而金鑰產生器依照渾沌系統的離散時間訊號與明文檔案的特徵值產生兩個金鑰序列。這些金鑰序列在加密演算法中分別被用於XOR運算、位元插入運算對明文檔案完成加密。
　　接下來我們將加密演算法和無線圖像傳輸系統實現到基於FPGA的SOPC系統之上，所使用的硬體為一對Altera的DE2-115母板與RFS子卡。此間我們優化了金鑰產生器並以獨立電路實現，獨立電路透過並列I/O端口傳輸金鑰到SOPC系統中。在SOPC系統中我們設計了兩種模式：發送模式、接收模式。在發送模式下，系統會從母板上的SD Card 讀入圖像檔案，然後呼叫加密演算法將圖像檔案加密，待圖像加密完成後將密文寫入母板上SD Card，再將密文透過子卡傳送到指定IP阜上。在接收模式下，系統會透過子卡自指定的阜接收密文，然後呼叫加密演算法將密文解密，待密文解密完成後將明文寫入到母板上的SD Card。此外系統在讀入、接收圖像以及加密、解密檔案後都會將處理後的資料透過VGA端口即時顯示。
　　最後我們透過對多個密文進行直方圖分析、相關性係數分析、差分攻擊分析以及熵值分析，驗證加密系統的安全性。並對本論文中基於FPGA的SOPC加密傳輸系統未來改進方向提出建議。

This thesis proposes an encryption algorithm. The key of the algorithm is generated based on the chaotic system. To this end, we designed a four-dimensional chaotic system and discussed the differences caused by compiling the chaotic system in different programming languages. Then we verified the characteristics of the chaotic system with phase portraits and Lyapunov exponent. After verification, we use the Euler's method to obtain the discrete-time signals of the chaotic system. The key generator generates two key sequences according to the discrete-time signal of the chaotic system and the characteristic value of the plaintext file. These key sequences are respectively used in XOR operation and Bits Insertion operation in the encryption algorithm to encrypt the plaintext file.
Next, we implement the encryption algorithm and wireless image transmission system to the FPGA-based SOPC system. The hardware used is a pair of Altera DE2-115 motherboard and RFS daughter card. Here, we optimize the key generator and implemented it as an independent circuit. The independent circuit transmits the key to the SOPC system through the parallel I/O port. In SOPC system we designed two modes: Send Mode, Receive Mode. In Send Mode, system read the image file from the SD Card on the motherboard, and then call the encryption algorithm to encrypt the image file. After the image is encrypted, the system write the ciphertext into the SD Card on the mother board, and then the ciphertext is transmitted to the specified IP Port through the daughter card. In Receive Mode, system receive the ciphertext from the specified IP Port through the daughter card, and then call the encryption algorithm to decrypt the ciphertext. After the ciphertext is decrypted, the system write the plaintext to the SD card on the motherboard. In addition, after the system reads in, receives images, and encrypts and decrypts files, the processed data is instantly displayed via the VGA port.
Finally, we verify the security of the encryption system by performing histogram analysis, correlation analysis, differential attack analysis, and entropy analysis on multiple ciphertexts. And proposes the future improvement direction of SOPC encrypted transmission system based on FPGA in this thesis.

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