簡易檢索 / 詳目顯示

研究生: 姚天舜
Tien-Shun Yao
論文名稱: 線上低功率之異質多核心即時排程
On-line Energy-efficient Real-time Task Scheduling for Heterogeneous Multicore Systems
指導教授: 陳雅淑
Ya-Shu Chen
口試委員: 謝仁偉
Jen-Wei Hsieh
吳晉賢
Chin-Hsien Wu
修丕承
Pi-Cheng Hsiu
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2014
畢業學年度: 103
語文別: 英文
論文頁數: 31
中文關鍵詞: 異質多核心低功率即時排程
外文關鍵詞: Heterogeneous multicore, Energy-efficient, Real-time Scheduling
相關次數: 點閱:321下載:1
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 在異質多核心系統中,為處理異質核心間協同處理的執行模式,使線上低功率之異質多核心即時排程必須於耗能與系統利用率進行取捨,大幅提高即時排程的複雜度。本篇論文提出了一個線上低功率之異質多核心即時排程架構,首先提出異質多核心功率比例計算,考慮硬體特性與工作負載以最小化系統耗能;並提出節能頻寬保留方法決定執行時期的可用頻寬與頻率,保證應用程式的服務品質;當系統負載過高時,為最大化系統可利用率,本論文亦提出線上工作重分配的方法考慮應用程式轉換核心執行的代價。本篇論文提出的方法經由一連串不同的工作負載評量,顯示其可有效節省系統耗能。


    On-line energy-efficient real-time task scheduling for a heterogeneous multicore system is complicated
    because of the synergistic processing between cores and the trade-off between energy conservation and
    schedulability. This study proposes a multicore energy efficiency ratio to minimize energy consumption
    with hardware properties and workload consideration. A bandwidth reservation algorithm is subsequently
    presented to provide quality of service of applications to deal with precedence constraint among
    tasks under a heterogeneous multicore system. To improve the schedulability for the heavy workload, a
    workload repartition is then proposed to reassign GPP and SPP subtasks with run-time repartitioning
    overhead consideration. The performance level of the proposed methodology was evaluated using a
    series of workloads and obtaining encouraging results.

    The rest of this paper is organized as follows: Chapter 2 presents the system model. Chapter 3 proposes an energy-efficient task scheduling framework for heterogeneous multicore systems, including multicore energy efficiency ratio in Section 3.2, bandwidth reservation in Section 3.3, the workload repartition in Section 3.4, and the admission control in Section 3.5. To provide further insights for system designers, an example is illustrated in Section 3.6, and a simulated annealing in presented in Section 3.7. Chapter 4 details the performance evaluation. Chapter 5 presents our conclusions.

    [1] Elsayed Saad, Medhat Awadalla, Mohamed Shalan, and Abdullah Elewi. Energy-aware task partitioning on
    heterogeneous multiprocessor platforms. arXiv preprint arXiv:1206.0396, 2012.
    [2] Chenguang Shen, Supriyo Chakraborty, Kasturi Rangan Raghavan, Haksoo Choi, and Mani B Srivastava.
    Exploiting processor heterogeneity for energy efficient context inference on mobile phones. In Proceedings
    of the ACM Workshop on Power-Aware Computing and Systems, page 9, 2013.
    [3] Pengcheng Huang, Orlando Moreira, Kees Goossens, and Anca Molnos. Throughput-constrained voltage
    and frequency scaling for real-time heterogeneous multiprocessors. In Proceedings of the Annual ACM
    Symposium on Applied Computing, pages 1517–1524, 2013.
    [4] Hui Cheng and Steve Goddard. Sys-edf: a system-wide energy-efficient scheduling algorithm for hard realtime
    systems. International Journal of Embedded Systems, pages 141–151, 2009.
    [5] Paolo Gai, Luca Abeni, and Giorgio Buttazzo. Multiprocessor dsp scheduling in system-on-a-chip architectures.
    In Proceedings of the IEEE Euromicro Conference on Real-Time Systems, pages 231–238, 2002.
    [6] Kwangsik Kim, Dohun Kim, and Chanik Park. Real-time scheduling in heterogeneous dual-core architectures.
    In Proceedings of the IEEE International Conference on Parallel and Distributed Systems, volume 2,
    pages 6–pp, 2006.
    [7] Ya-Shu Chen and Ming-Yang Chen. On-line energy-efficient real-time task scheduling for a heterogeneous
    dual-core system-on-a-chip. Journal of Systems Architecture, pages 234–244, 2013.
    [8] Ya-Shu Chen, Han Chiang Liao, and Ting-Hao Tsai. Online real-time task scheduling in heterogeneous
    multicore system-on-a-chip. IEEE Transactions on Parallel and Distributed Systems, 24(1):118–130, 2013.
    [9] Y. Wang, D. Liu, M. Wang, Z. Qin, and Z. Shao. Optimal task scheduling by removing inter-core communication
    overhead for streaming applications on mpsoc. In Proceedings of the IEEE Real-Time and Embedded
    Technology and Application Symposium, pages 195–204, April 2010.
    [10] Yi Wang, Duo Liu, Zhiwei Qin, and Zili Shao. Optimally removing intercore communication overhead for
    streaming applications on mpsocs. IEEE Transactions on Computers, 62(2):336–350, 2013.
    [11] Chin-Fu Kuo and Ying-Chi Hai. Real time task scheduling on heterogeneous two-processor systems. In
    Algorithms and Architectures for Parallel Processing, pages 68–78, 2010.
    [12] Allen DMalony, Scott Biersdorff, Sameer Shende, Heike Jagode, Stanimire Tomov, Guido Juckeland, Robert
    Dietrich, Duncan Poole, and Christopher Lamb. Parallel performance measurement of heterogeneous parallel
    systems with gpus. In Proceedings of the IEEE International Conference on Parallel Processing, pages 176–
    185, 2011.
    [13] Shinpei Kato, Karthik Lakshmanan, Ragunathan Raj Rajkumar, and Yutaka Ishikawa. Timegraph: Gpu
    scheduling for real-time multi-tasking environments. In Proceedings of the USENIX Annual Technical Conference,
    page 17, 2011.
    [14] Cong Liu, Jian Li, Wei Huang, Juan Rubio, Evan Speight, and Xiaozhu Lin. Power-efficient time-sensitive
    mapping in heterogeneous systems. In Proceedings of the ACM international conference on Parallel architectures
    and compilation techniques, pages 23–32, 2012.
    26
    [15] Yang Jiao, Heshan Lin, Pavan Balaji, and Wu-chun Feng. Power and performance characterization of computational
    kernels on the gpu. In Green Computing and Communications (GreenCom), IEEE/ACM Int’l
    Conference on Int’l Conference on Cyber, Physical and Social Computing (CPSCom), pages 221–228, 2010.
    [16] Liesbeth Steffens, Manvi Agarwal, and Pieter van der Wolf. Real-time analysis for memory access in media
    processing socs: A practical approach. In Proceedings of the IEEE Euromicro Conference on Real-Time
    Systems, pages 255–265, 2008.
    [17] Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley,
    Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, et al. The worst-case executiontime
    problem-overview of methods and survey of tools. ACM Transactions on Embedded Computing Systems,
    page 36, 2008.
    [18] Marco Spuri and Giorgio Buttazzo. Scheduling aperiodic tasks in dynamic priority systems. Real-Time
    Systems, pages 179–210, 1996.
    [19] Shuai Che, Michael Boyer, Jiayuan Meng, David Tarjan, Jeremy W Sheaffer, and Kevin Skadron. A performance
    study of general-purpose applications on graphics processors using cuda. Journal of parallel and
    distributed computing, pages 1370–1380, 2008.
    [20] Chunyang Gou and Georgi N Gaydadjiev. Addressing gpu on-chip shared memory bank conflicts using
    elastic pipeline. International Journal of Parallel Programming, pages 400–429, 2013.
    [21] Jian-Jia Chen and Chin-Fu Kuo. Energy-efficient scheduling for real-time systems on dynamic voltage
    scaling (dvs) platforms. In RTCSA, pages 28–38, 2007.
    [22] Ben Kao and Hector Garcia-Molina. Deadline assignment in a distributed soft real-time system. IEEE
    Transactions on Parallel and Distributed Systems, pages 1268–1274, 1997.
    [23] William R Parzynski. Introduction to mathematical analysis. McGraw-Hill, Inc., 1982.
    [24] Horst D Simon and Shang-Hua Teng. How good is recursive bisection? SIAM Journal on Scientific Computing,
    pages 1436–1445, 1997.
    [25] Hakan Aydin, Rami Melhem, Daniel Moss’e, and Pedro Mejia-Alvarez. Dynamic and aggressive scheduling
    techniques for power-aware real-time systems. In Proceedings of the IEEE Real-Time Systems Symposium,
    pages 95–105, 2001.
    [26] Tohru Ishihara and Hiroto Yasuura. Voltage scheduling problem for dynamically variable voltage processors.
    In Proceedings of the IEEE International Symposium on Low Power Electronics and Design, pages 197–202,
    1998.
    [27] Jos’e Mar’ıa L’opez, Jos’e Luis D’ıaz, and Daniel F Garc’ıa. Utilization bounds for edf scheduling on real-time
    multiprocessor systems. Real-Time Systems, 28(1):39–68, 2004.
    [28] Omar U Pereira Zapata and Pedro Mejıa Alvarez. Edf and rm multiprocessor scheduling algorithms: Survey
    and performance evaluation. Seccion de Computacion Av. IPN, 2005.
    [29] Hao Wang, Vijay Sathish, Ripudaman Singh, Michael J Schulte, and Nam Sung Kim. Workload and power
    budget partitioning for single-chip heterogeneous processors. In Proceedings of the ACM international conference
    on Parallel architectures and compilation techniques, pages 401–410, 2012.
    27
    [30] Jungseob Lee, Vijay Sathisha, Michael Schulte, Katherine Compton, and Nam Sung Kim. Improving
    throughput of power-constrained gpus using dynamic voltage/frequency and core scaling. In Proceedings of
    the IEEE International Conference on the Parallel Architectures and Compilation Techniques, pages 111–
    120. IEEE, 2011.
    [31] Fan Zhang and Samuel T Chanson. Processor voltage scheduling for real-time tasks with non-preemptible
    sections. In Proceedings of the IEEE Real-Time Systems Symposium, pages 235–245, 2002.

    QR CODE