金屬氧化物薄膜電晶體一般都採用下閘極上接觸式的結構，以防止TFT-LCD的背光源照射到通道層材料進而影響其電特性。另外在此下閘極結構中，因為要考慮到光罩間對位的誤差，而將其汲極和源極設計成與閘極各有一覆蓋區域，產生寄生電容而影響電晶體操作速度。
　　我們提出了一種利用新式自我對準結構來製作薄膜電晶體元件，以減少寄生電容，且在光罩數目上也會減少；並以接觸電阻分析、電性分析、電容-電壓特性、反向器上昇時間，與傳統非自我對準結構之元件作綜合性的比較以證明寄生電容效應的降低。
　　最後我們會在新式自我對準結構之元件上披覆鐵氟龍與二氧化矽組合之雙層保護層，其以熱蒸鍍製作之鐵氟龍用來防止a-IGZO薄膜因濺鍍二氧化矽的過程中所受到的電漿損害。並探討此方法製作的保護層與未使用保護層的元件，在不同大氣環境與閘極偏壓下之穩定度。

Metal oxide thin-film transistor (TFT) is generally using bottom-gate and top-contact structure to prevent the effect of backlight of liguid crystal display (LCD) on the electrical performance of TFT. In bottom-gate structure, the drain and source (S/D) electrodes are designed to have a coverage area up the gate electrode to take into account the alignment error; however, this coverage area can create the parasitic capacitance to affect the operation speed of TFT.
　　We proposed a novel structure that is using self-align process to reduce the parasitic capacitances between the gate and the S/D electrodes. Furthermore, we investigated the effect of reduced parasitic capacitance on TFT performance using transmission line method (TLM), capacitance-to-voltage (C-V) measurement, and the rise-time of fabricated inverter measurement.

　　In addition, we performed investigation of a Teflon/SiO2 bilayer passivation on the stability of TFT that is using the proposed self-align structure. The Teflon was deposited as a buffer layer using a thermal evaporator, and it exhibited good compatibility with the underlying a-IGZO layer. The Teflon as buffer layer can effectively protect the a-IGZO TFTs from plasma damage during the sequent SiO2 passivation process. The stability of TFT was studied with various ambient condition and various bias stress.

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