本文以數位控制實現具調節循環電流及平衡輸出電容電壓功能之三相三階整流器。由於負載需求日益增加，現今常以並聯方式提高系統容量，為使低頻諧波量降低，磁性元件之體積使系統難以小型化，因此本文使用交錯式並聯系統，使兩組整流器之控制訊號互相交錯以降低電流漣波及總諧波失真(Total Harmonic Distortion, THD)。整流器架構採用Vienna整流器，因其架構開關元件少、開關耐壓要求低、架構簡單、可作為交流-直流及直流-交流轉換器、輸入功率因數高、輸入諧波量低且系統可靠性高等優勢而被廣泛研究，可應用於電動車充電站及微電網系統等，但由於輸出為兩組電容串聯組成，實際應用將造成電容電壓不均之問題，本文將介紹如何使用控制方式解決輸出電容電壓不均問題。調變方式採用空間向量脈波寬度調變(Space Vector Pulse Width Modulation, SVPWM)，具有總諧波失真較低與電壓利用率高等特性，且在控制系統中較容易調整各區間之時間。並聯系統中，將因開關序列不同、輸出直流電壓不同等因素，造成循環電流產生，本文將介紹如何使用控制方式抑制循環電流。其中電容電壓平衡控制及循環電流控制將分配為每組整流器各控制一種以減少控制誤差。本文以電路模擬軟體PSIM建構出兩組總功率為6.6 kW之Vienna整流器並模擬，驗證硬體設計及數位控制之可行性。實作電路之數位控制器選用德州儀器之TMS320F280049為控制核心，實現系統控制並驗證。

This thesis uses a digital controller to implement a three-phase three-level rectifier with the functions of suppressing circulating current and balancing output capacitor voltage. Due to the load demand increases, the system capacity is often increased in parallel. In order to reduce the amount of low-frequency harmonics, the volume of magnetic components makes the system difficult to miniaturize. This thesis uses an interleaved parallel system to interleave the control signals of the two sets of rectifiers to reduce current ripple and total harmonic distortion. The rectifier topology adopts the Vienna rectifier, which has been widely studied due to the advantages of fewer switching elements, low switch withstands voltage requirements, simple architecture, bidirectional conduction, high input power factor, low input harmonics, and high system reliability. It can be applied to electric vehicle charging stations and micro-grid systems, etc. However, since the output is composed of two sets of capacitors in series, it will cause the problem of unbalanced capacitor voltage in practical applications. This thesis will introduce how to use control methods to solve the problem of unbalanced output capacitor voltage. The modulation method adopts Space Vector Pulse Width Modulation. It has the characteristics of low total harmonic distortion and high voltage utilization, and it is easier to adjust the time of each interval in the control system. In a parallel system, due to factors such as different switching sequences and different output DC voltages, circulating currents will be generated. This thesis will introduce how to use control methods to suppress circulating current. In this thesis, capacitor voltage balance control and circulating current control are assigned to each group of controllers to reduce control errors. This paper uses the circuit simulation software PSIM to construct two groups of Vienna rectifiers with a total power of 6.6 kW and simulate them to verify the feasibility of hardware design and digital control. The digital controller of the implementation circuit selects TMS320F280049 from Texas Instruments as the control core to realize system control and verification.

[1] Jang, Y. and Jovanovic, M. M., “A New Input-Voltage Feedforward Harmonic-Injection Technique with Nonlinear Gain Control for Single-Switch, Three-Phase, DCM Boost Rectifiers,” IEEE Transactions on Power Electronics, vol. 15, no. 2, pp. 268-277, Mar. 2000.
[2] Qiao, C. and Smedley, K. M., “A General Three-Phase PFC Controller for Rectifiers With a Parallel-Connected Dual Boost Topology,” IEEE Transactions on Power Electronics, vol. 17, no. 6, pp. 925-934, NOV. 2002.
[3] E. F. de Oliveira, S. V. Araujo, B. Dombert and P. Zacharias, “Comparative evaluation of three-phase PFC rectifiers for mains interfacing of on-board electric vehicle battery charging systems,” IEEE 13th Brazilian Power Electronics Conference and 1st Southern Power Electronics Conference (COBEP/SPEC), pp. 1-6, Nov. 2015.
[4] E. L. M. Mehl and I. Barbi, “An improved high power factor and low cost three-phase rectifier,” Proceedings of 1995 IEEE Applied Power Electronics Conference and Exposition - APEC'95, vol.2, pp. 835-841, Mar. 1995.
[5] J. Hu, W. Xiao, B. Zhang, D. Qiu and C. N. M. Ho, “A Single Phase Hybrid Interleaved Parallel Boost PFC Converter,” 2018 IEEE Energy Conversion Congress and Exposition (ECCE), pp. 2855-2859, Sep. 2018.
[6] K. Sun, X. Lin, Y. Li, Y. Gao and L. Zhang, “Improved Modulation Mechanism of Parallel-Operated T-Type Three-Level PWM Rectifiers for Neutral-Point Potential Balancing and Circulating Current Suppression,” IEEE Transactions on Power Electronics, vol. 33, no. 9, pp. 7466-7479, Sep. 2018.
[7] Z. Zou, F. Hahn, G. Buticchi, S. Günter and M. Liserre, “Interleaved Operation of Two Neutral-Point-Clamped Inverters With Reduced Circulating Current,” IEEE Transactions on Power Electronics, vol. 33, no. 12, pp. 10122-10134, Dec. 2018.
[8] S. Bella et al., “Circulating Currents Control for Parallel Grid-Connected Three-Phase Inverters,” 2018 International Conference on Electrical Sciences and Technologies in Maghreb (CISTEM), pp. 1-5, Oct. 2018.
[9] M. Cacciato, A. Consoli, G. Scarcella and A. Testa, “Reduction of common-mode currents in PWM inverter motor drives,” IEEE Transactions on Industry Applications, vol. 35, no. 2, pp. 469-476, Mar.-Apr. 1999.
[10] Q. Zhang, X. Xing and K. Sun, “Space Vector Modulation Method for Simultaneous Common Mode Voltage and Circulating Current Reduction in Parallel Three-Level Inverters,” IEEE Transactions on Power Electronics, vol. 34, no. 4, pp. 3053-3066, Apr. 2019.
[11] Z. Liang, X. Lin, X. Qiao, Y. Kang and B. Gao, “A Coordinated Strategy Providing Zero-Sequence Circulating Current Suppression and Neutral-Point Potential Balancing in Two Parallel Three-Level Converters,” IEEE Journal of Emerging and Selected Topics in Power Electronics, vol. 6, no. 1, pp. 363-376, March 2018.
[12] Yo-Han Lee, Bum-Seok Suh and Dong-Seok Hyun, “A novel PWM scheme for a three-level voltage source inverter with GTO thyristors,” Proceedings of 1994 IEEE Industry Applications Society Annual Meeting, vol.2, pp. 1151-1157, Oct. 1994.
[13] Yao Wenxi, Lu Zhengyu, Fei Wanmin, Qiao Zhaoming, Gu Yilei and Mingfang Zheng, “Three-level SVPWM method based on two-level PWM cell in DSP,” Nineteenth Annual IEEE Applied Power Electronics Conference and Exposition, 2004. APEC '04., vol.3, pp. 1720-1724, Feb. 2004.
[14] H. Zhang, S. Jon Finney, A. Massoud and B. Wayne Williams, “An SVM Algorithm to Balance the Capacitor Voltages of the Three-Level NPC Active Power Filter,” IEEE Transactions on Power Electronics, vol. 23, no. 6, pp. 2694-2702, Nov. 2008.
[15] Chang-Su Ma, Tae-Jin Kim, Dae-Wook Kang and Dong-Seok Hyun, “A simple control strategy for balancing the DC-link voltage of neutral-point-clamped inverter at low modulation index,” IECON'03. 29th Annual Conference of the IEEE Industrial Electronics Society (IEEE Cat. No.03CH37468), vol.3, pp. 2167-2172, Nov. 2003.
[16] N. Celanovic and D. Boroyevich, “A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters,” IEEE Transactions on Power Electronics, vol. 15, no. 2, pp. 242-249, Mar. 2000.
[17] A. M. Hava, Seung-Ki Sul, R. J. Kerkman and T. A. Lipo, “Dynamic overmodulation characteristics of triangle intersection PWM methods,” IEEE Transactions on Industry Applications, vol. 35, no. 4, pp. 896-907, Jul.-Aug. 1999.
[18] S. Srivastava and M. A. Chaudhari, “Comparison of SVPWM and SPWM Schemes for NPC Multilevel Inverter,” 2020 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS), pp. 1-6, Feb. 2020.
[19] Y. Liu, X. Wang and Y. Xing, “Research based on SVPWM method of three level inverter,” Proceedings of the 30th Chinese Control Conference, pp. 4513-4515, Jul. 2011,.
[20] Z. Zhao, “An Optimized Three-Phase Three-Level SVPWM Modulation Algorithm,” 2016 International Conference on Industrial Informatics - Computing Technology, Intelligent Technology, Industrial Information Integration (ICIICII), pp. 345-350, Dec. 2016.
[21] G. Grandi and J. Loncarski, “Evaluation of current ripple amplitude in three-phase PWM voltage source inverters,” 2013 International Conference-Workshop Compatibility And Power Electronics, pp. 156-161, Jun. 2013.
[22] Magnetic Powder Core, Chang Sung Corporation, ver14, 2016.