晶圓薄化與化學機械拋光平坦化廣泛應用在半導體製程方面，屬於超精密平坦化加工技術。在矽晶圓基板製造、封裝製程之晶圓薄化以及半導體IC製程之線寬縮減等需求下，晶圓薄化以及化學機械拋光平坦化能夠克服日益嚴苛的製程需求。本研究主要目的為建立晶圓薄化製程模式(Wafer Thinning Model, WTM)應用在矽晶圓厚度變異量(Total Thickness Variation, TTV)預測，以及拋光平坦化製程模式(Wafer Planarization Model, WPM)應用在矽晶圓及多層異質薄膜(Multi-Laminated Heterogeneous Film, MLHF)之材料移除率(Material Removal Rate, MRR)預測上。在WTM建構方面，本文以等效接觸長建構預測模式，模擬結果顯示主軸傾斜角變化對於載具與矽晶圓形貌最具影響，當修整主軸傾斜角參數(αc及βc)及晶圓薄化主軸傾斜角參數(αw及βw)角度相同時，預測值顯示矽晶圓TTV為0μm，20片晶圓薄化實驗值顯示介於1-3μm。在WPM建構方面，本研究以等效膜厚探討微觀表面之材料移除行為，模擬結果顯示MRR與有效磨粒數以及磨粒切深有關。在有效磨粒數分析方面，接觸面積隨著下壓力增加呈現非線性正相關，因此介於拋光墊粗度峰與晶圓表面基材之有效磨粒數亦隨接觸面積而變化。在磨粒切深分析方面，施加於磨粒之負載與拋光墊硬度呈現正相關，因此磨粒切深亦隨拋光墊硬度而變化。在預測值與實驗結果分析方面，以線性回歸方程式探討預測值與實驗結果之差異性，誤差原因在於WPM相關參數之估算誤差，包含磨粒數量估算、磨粒切深估算以及拋光墊硬度等因素，並針對WPM進行誤差因子修正。本研究所建立之製程模式可應用在大尺寸矽晶圓基板平坦化製程、矽晶圓薄化製程以及90nm以下化學機械拋光平坦化製程上之參考依據。

Wafer thinning and chemical mechanical planarization (CMP) process have been widely applied in integrated circuit (IC) fabrication. Due to demands of wafer production, backside thinning before IC packaging and reduction of line width in IC lithography, wafer thinning and CMP can efficiently achieve the tight specification of thinning and planarization. This research aims to develop the wafer thinning model (WTM) to predict the total thickness variation (TTV) and also the wafer planarization model (WPM) to predict material removal rate (MRR) of wafers and multi-laminated heterogeneous film (MLHF). For wafer thinning, this research has developed the WTM with effective contact length (ECL). Simulated results of WTM show that the estimated TTV=0μm if the spindle tilting angles of chuck dressing and those of wafer grinding are the same values. Experimental results of TTV of 20 ground wafers can achieve 1-3μm with current set-up in this research. For wafer planarization, this research has developed WPM with the equivalent film thickness to simulate the material removal rate (MRR). Simulated results show that the numbers of abrasive and depth of cutting are significantly parameters on MRR. Comparison of the difference of MRR between simulated results and experimental results show that the numbers of abrasive, depth of cutting and hardness of pad are the main contribution of the prediction errors. Results of this study can be applied to large dimension wafer with the developed WTM and WPM. Further research is to explore in ultra-thin wafer grinding and also the CMP for IC fabrication under 90nm linewidth.

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