近年對於晶片的需求大幅增長，而其電路設計圖案依賴於微影技術將其轉印至矽基板上，並且隨著關鍵尺寸(Critical Dimension)的日漸微縮、單位面積下所容納的電路圖案增多以及晶片尺寸增大的趨勢，為了降低發生曝光缺陷的問題，解析度增強技術(Resolution Enhancement Technology, RET)的應用逐漸受到重視。為增加製程良率需要RET的應用逐漸面臨運算時間過長或計算機效能受限的影響。於本論文中藉由多群的多目標蟻群演算法(Multi-Colony Multi-objective Ant Colony System, mcMOACS)，針對多片子光罩圖案於解空間(Solution Space)中探尋得前緣最佳解(Pareto Front)，並依其生成自由形式光源(Freeform Source)，再利用圖案選取(Pattern Selection)代替關鍵剪輯進行優化，降低運算時間。生成之光源、光罩與成像評估將利用KLA_Tencor標準數值微影平台PROLITH計算出空間潛像(Aerial Image, AI)進行驗證。引入實驗室所建置的關鍵點(Critical Shape Point , CS Point)放置進行邊緣放置誤差(Edge Placement Error, EPE)計算提升輪廓誤差計算效率。在二維Contact Hole及Line Space Array的關鍵剪輯光罩圖案測試下，使用圖案選取的mcMOACS與無使用的MOACO比較，運算時間減少了465.7與689.9小時，而EPE總和下降1.17E+04與1.66E+07，並且量測位置的曝光結果符合製程要求。使用被選取子光罩圖案進行光源及光罩優化，在Line Space Array圖案上與無使用的MOACO比較，運算時間減少668.1小時，EPE總和下降8.17E+07。在Contact Hole圖案上，協同優化的邊緣放置誤差較大，因為被選取圖案位於關鍵剪輯的邊界上，以至於OPC受到影響。由此證明成功開發應用於全域光罩及關鍵剪輯的最佳化光源設計，且在條件限制下成功開發協同優化程序。

In recent years, there has been a significant increase in demand for chips. The circuit design patterns rely on photolithography techniques to transfer them onto silicon substrates. With the continuous shrinking of critical dimensions, the increasing complexity of circuit patterns within a unit area, and the trend of larger chip sizes, the application of Resolution Enhancement Technology (RET) has gradually gained attention to reducing exposure defects. However, using RET to improve process yield is increasingly facing challenges such as long computational time and limited computational resources.
This research uses a multi-colony Multi-objective Ant Colony System (mcMOACS) to explore the Pareto front of multiple sub-critical clip patterns in the solution space and generate a freeform source according to the obtained solutions. Instead of using critical clips for optimization, pattern selection is applied to reduce computational time. The generated source, masks, and imaging evaluations are verified using the KLA_Tencor standard numerical lithography platform PROLITH to calculate the aerial image (AI) in the spatial domain. The introduction of Critical Shape Points (CS Points) constructed in the laboratory enhances the efficiency of edge placement error (EPE) calculations.
In the tests of critical clip patterns for 2D contact holes and line space arrays, the mcMOACS with pattern selection is compared with MOACO without pattern selection. The computational time is reduced by 465.7 and 689.9 hours, while the total EPE decreases by 1.17E+04 and 1.66E+07, respectively. The exposure results at the measurement locations meet the process requirements. When using the selected sub-critical clip patterns for mcMOACS source and mask optimization in the line space array pattern, compared with MOACO without pattern selection, the computational time is reduced by 668.1 hours, and the total EPE decreases by 8.17E+07. In the case of contact hole patterns, the EPE is higher in the cooperative optimization process because the selected sub-critical clip patterns are located on the boundary of critical clips, affecting the optical proximity correction (OPC). This demonstrates the successful development of optimized source design for full-chip and critical clips and the successful development of a cooperative optimization process under given constraints.

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