近年來，傳統浮動閘極記憶體面臨尺寸微縮的挑戰，例如在穿隧氧化層之非揮發性記憶體在一個很長的操作期間，容易地產生漏電流路徑，因此，分散的儲存電荷之奈米晶結構是下一代非揮發性記憶體元件結構。
本實驗以濺鍍法製備Ni薄膜作為電荷儲存層之奈米晶記憶體，於退火條件900℃/3min/N2後進行電特性量測發現，施加偏壓±10V可得記憶視窗2.37V及儲存電荷密度7.36×1011cm-2，在持久性量測發現施加5V應力經過104秒其記憶視窗為1.06V，而電荷損失率約25.35%，在施予-20V的閘極電壓下，漏電流密度為0.439A/cm2，經XPS分析發現，高溫退火導致Ni擴散到阻止氧化層中並形成介金屬化合物Al3Ni。
另一新穎元素Sn作為電荷儲存層之非揮發性記憶體亦以濺鍍法製備，於退火140℃/30min/Ar後進行電特性量測，發現施加偏壓±8V可得記憶視窗1.46V和儲存電荷密度3.10×1011cm-2，在持久性量測發現施加5V應力經過104秒其記憶視窗為0.81V，而電荷損失率約38.17%，在施予-20V的閘極電壓下，漏電流密度為1.11×10-2A/cm2，經XPS分析發現，Sn沒有擴散現象發生，但有SnO相出現。

Recently, the conventional floating gate memory faces a challenge of scaling down, such as the thinner tunneling oxide suffers from leakage path generation easily after a long duration operation. Therefore, nanocrystal (NC) structure with distributed storage elements was proposed as the next generation structure for nonvolatile memory devices.
The nickel film as a charge storage layer for nanocrystal memory was prepared by sputtering method. Device sample subjected to 900℃ annealing for 3min in N2 atmosphere exhibited a significant hysteresis memory window shift of 2.37V and charge density of 7.36×1011cm-2 after 10V voltage sweep. It was also found a memory window shift about 1.06V and the charge loss about 25.35% in the sample after 104sec retention time at a 5V voltage stress. The leakage current obtained from the I-V measurement was 0.439A/cm2 at the gate voltage of -20V. XPS analysis indicated that annealing induced the nickel diffusion to blockage layer and fromed intermetallic compound of Al3Ni.
Tin was the other novel element to be used as the charge storage layer for nonvolatile memory. In this study, the tin layer was deposited by sputtering. Device sample subjected to 140℃ annealing for 30min in Ar atmosphere exhibited a significant hysteresis memory window shift of 1.46V and the charge density of 3.10×1011cm-2 after 8V voltage sweep. Under the retention tests, the memory window became 0.81V and the charge loss rate was 38.17% after suffering a 5V stress for 104sec. The leakage current density obtained from the J-E measurement was 1.11×10-2A/cm2 at the gate voltage of -20V. From the result of XPS, it is evident that tin did not diffuse to the blockage layer and existed as SnO in nanocrystal memory.

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