現代生醫感測積體電路設計著重於低功耗，本研究也致力於此目的發展低功耗之應用感測電路。此電路不需要大能量供應，所以可延長感測時間，並可應用在可攜式裝置中。但積體電路設計往往依不同需求而客製化生產，在設計和製程會花費許多金錢和時間上的成本，所以本研究將可調整之設計觀念加入，產品可依照需求做調整，方可節省設計上的時間成本。
本論文提出一低功耗、可編程、可重組之高階類比濾波器。本研究利用台積電 0.35μm製程設計雙二階(biquad)濾波器串接為十二階類比濾波器，雙二階濾波器擁有帶通濾波和低通濾波兩種功能，可應用於不同感測需求，其中此濾波器可以自由選取雙二階濾波器串接階數，因此此濾波器可重組為不同階數的濾波器，最多可串接為十二階類比濾波器，其目的為增加濾波器之衰減程度，使濾波效果更為準確。
此雙二階濾波器最大特點為可編程之轉導放大器組合之轉導電容濾波器，在轉導放大器電路中，利用懸浮閘編程技術，控制電晶體閘級電壓，達到可編程轉導放大器之電流，藉此調整轉導放大器的轉導值，選擇轉導值可以改變雙二階濾波器之轉移函數，此編程行為決定其濾波器之截止頻率、品質因數、直流增益。除此之外懸浮閘編程技術在本研究也運用在共模回授電路、非揮發性記憶體；懸浮閘編程技術是本研究的核心技術。
本篇論文總共分為六章，其中第一章為導論。在第二章中，將會介紹濾波器和懸浮閘電晶體的基本理論。而第三章中，介紹轉導電容濾波器低功耗設計的實現方法和其優缺點分析及改善。於第四章中，說明電路架構和佈局。在第五章為量測結果與討論。最後第六章為結論。

Recently more and more biomedical sensing systems are required to be integrated into a small volume achieving a small form factor to facilitate non-obstructive health monitoring and diagnoses. In these systems, power consumption is a critical design factor because of the limited power resources for long-term monitoring and because of the stringent criterions for power dissipation. Therefore, how to design low-power or power-efficient sensing front-end integrated circuits has drawn more and more attention in both academia and industrials.
This research focuses on the development of an integrated power-efficient reconfigurable filter circuit that can be adopted in biomedical sensing front-ends. Analog integrated circuit is usually customized for some specific application and usually costs money and time in design, fabrication, and testing. However, in this research, we proposed a reconfigurable system so that the circuit can be programmed differently according to the demands of the applications. It can be more economic both in finance and in time.
In this thesis, a low-power reconfigurable high-order analog filter chip with a large dynamic range is designed and tested. The chip is composed of 6 identical reconfigurable biquad circuits of which gain, quality factor, and nature frequency all can be programmed using floating gate technologies. This biquad provides both lowpass and bandpass responses. It can be configured to make up any 12-order all-pole filters, such as Butterworth, Chebyshev, or Bessel filers. The chip was fabricated in TSMC 0.35μm 2P4M standard CMOS process. The measured dynamic range of a single biquad proposed in this research can be 55dB with corner frequency set at 1KHz while consuming 80nW.

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