研究生: |
賴冠衡 Kuan-Heng Lai |
---|---|
論文名稱: |
並聯交錯式三相三階維也納整流器之零序循環電流抑制 Zero-Sequence Circulating Current Suppression of Parallel Interleaved Three-Phase Three-Level Vienna Rectifiers |
指導教授: |
邱煌仁
Huang-Jen Chiu |
口試委員: |
邱煌仁
Huang-Jen Chiu 謝耀慶 Yao-Ching Hsieh 張佑丞 Yu-Chen Chang |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2022 |
畢業學年度: | 110 |
語文別: | 中文 |
論文頁數: | 90 |
中文關鍵詞: | 維也納整流器 、輸出電容電壓平衡 、循環電流 、並聯交錯式控制系統 |
外文關鍵詞: | Vienna rectifier, Output capacitor voltage balance, Circulating current, Parallel interleaved control system |
相關次數: | 點閱:331 下載:2 |
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本文旨在探討具輸出電容電壓平衡功能及達成零序循環電流抑制之維也納整流器(Vienna Rectifier),其為三相三階之架構,此架構有低開關應力、開關損耗較小、低輸入諧波量等優勢,可應用於不斷電系統、車用充電樁等。為提高充電速率並因應日益增加的負載需求量、降低低頻諧波量,故本文採用並聯交錯式控制系統,同時可使總諧波失真及電流漣波降低。此架構之輸出端由兩串聯之電容所組成,於實際電路應用上可能產生電容電壓不平衡之問題,且由於電路為未加上隔離元件的並聯系統,可能因輸出電容電壓不平衡或同一時間內各組電路開關狀態不同,使電路間產生循環電流;為此,本文將探討空間向量脈波寬度調變法(Space Vector Pulse Width Modulation, SVPWM)及後續引入的不連續脈波寬度調變法(Discontinuous Pulse Width Modulation, DPWM)二者之輸出電容電壓平衡控制策略,以及分析零序循環電流產生原因與抑制策略,並將採用兩種調變法後其各自產生之循環電流作比較;最終以電路模擬軟體PSIM建構兩組總功率為20kW之維也納整流器,驗證硬體及數位控制之可行性。
The purpose of this paper is to discuss the Vienna Rectifier with output capacitor voltage balance function and zero-sequence circulating current suppression, it is a three-phase three-level architecture. This architecture has the advantages of low switching stress, less switching loss, and low input harmonics. It can be used in uninterruptible power systems and vehicle charging pile etc. In order to improve the charging rate and reduce the amount of low-frequency harmonics in response to the increasing load demand, this paper adopts a parallel interleaved control system, which can reduce the total harmonic distortion and current ripple at the same time. The output of this structure is composed of two capacitors connected in series, which may cause the problem of unbalanced capacitor voltage in practical circuit applications, and because the circuit is a parallel system without isolation components, the circulating current may be generated between the circuits due to the unbalanced voltage of the output capacitor or the different switching states of each group of circuits at the same time;to this end, this paper will discuss the output capacitor voltage balance control strategy of Space Vector Pulse Width Modulation (SVPWM) and the subsequently introduced Discontinuous Pulse Width Modulation (DPWM) method, analyze the causes and suppression strategies of zero-sequence circulating current, and compare the circulating currents generated by the two modulation methods. Finally, two sets of Vienna rectifiers with a total power of 20kW are constructed with the circuit simulation software PSIM to verify the hardware and the feasibility of digital control.
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