本論文提出以多維延遲陣列為基礎，結合相位排序及選擇技術實現多通道數位至時間轉換器(Digital-to-Time Converter, DTC)，將參考時脈訊號利用鎖相迴路(Phase-Locked Loop, PLL)進行相移，再透過延遲矩陣分割相位，產生精細的時間差，使得延遲矩陣中之所有延遲單元均由PLL精確控制，輸出相位均勻分佈於參考時脈週期內，形成三維延遲陣列，大舉降低此架構之邏輯元件利用率，並搭配延遲迴繞(Wrapping)效應排序與選擇輸出時序，以提高延遲時間之精度，實現高達2 ps的有效解析度，將此設計驗證於Altera Stratix IV，其擁有四組通道輸出，經量測之積分非線性誤差(Integral Nonlinearity, INL)分別為-2.24至2.36 LSB、-2.31至2.31 LSB、-2.38至1.91 LSB以及-2.06至2.01 LSB，微分非線性誤差(Differential Nonlinearity, DNL)分別為-2.13至2.92 LSB、-3.74至3.03 LSB、-2.77至2.48 LSB和-2.50至2.31 LSB，而其抖動約為3.63 LSB，此架構之性能優於大部分現有的類比設計，亦能幾乎完勝市售之昂貴儀器。爾後，為了降低開發成本，亦將電路執行於較低廉的Cyclone IV DE2-115 教育開發平台上，實現相同之解析度與通道數，其最佳之INL與DNL範圍分別為-4.15至2.83 LSB及-3.81至4.44 LSB，而最大抖動則為12.17 LSB。

A multi-channel digital-to-time converter based on a multi-dimensional delay array is proposed in this thesis. Dividing the phase through the delay matrix with a phase-locked loop for phase shifting produces the fine stage difference. All delay cells in the delay matrix are precisely controlled by a PLL so that the output phases uniformly distribute within the reference clock period. For further resolution enhancement, the three-dimensional array is presented with phase sorting and selection after delay wrapping. It can ensure high enough accuracy and substantially reduce the logic utilization. For concept proof, the proposed DTC is implemented on an Intel Stratix-IV FPGA board to achieve a resolution up to 2 ps with low integral nonlinearities (INL) of -2.24 to 2.36 LSB, -2.31 to 2.31 LSB, -2.38 to 1.91 LSB, and -2.06 to 2.01 LSB. The corresponding differential nonlinearities (DNL) are -2.13 to 2.92 LSB, -3.74 to 3.03 LSB, -2.77 to 2.48 LSB, and -2.50 to 2.31 LSB, respectively. At the same time, its jitter is about 3.63 LSB. The performance is superior to a luxury commercial product, and most analog counterparts realized with full-custom designs. Furthermore, the circuit implements on a relatively cheap Cyclone IV DE2-115 educational development platform for cost reduction and achieves the same resolution and number of channels with the best INL and DNL performance of -4.15 to 2.83 LSB and -3.81 to 4.44 LSB, respectively. At the same time, its maximum jitter is about 12.17 LSB.

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