應用於HDTV之14位元100MS/s電流式數位類比轉換器｜國立臺灣科技大學博碩士論文系統

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研究生：	林星宏 Hsing-Hung Lin
論文名稱：	應用於HDTV之14位元100MS/s電流式數位類比轉換器 A 14Bit 100MS/s Current-Steering Digital to Analog Converter for HDTV
指導教授：	陳伯奇 Poki Chen
口試委員:	鍾勇輝 Yung-Hui Chung 方劭云 Shao-Yun Fang 郭建宏 Chien-Hung Kuo
學位類別：	碩士 Master
系所名稱：	電資學院 - 電子工程系 Department of Electronic and Computer Engineering
論文出版年：	2016
畢業學年度：	104
語文別：	中文
論文頁數：	72
中文關鍵詞：	數位轉類比
外文關鍵詞：	Digital to Analog
相關次數：	點閱：148 下載：7
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在本論文中，主要實現一個可操作在100MHz十四位元的電流導向式數位類比轉換器，並且探討它的設計方法及設計時所需要注意的地方。之此100MHz十四位元的電流導向式數位類比轉換器式使用聯電(UMC)1P6M 0.18μm CMOS製程來實現。在此架構中，其中最大的6個數位碼轉成溫度碼及中間4個數位碼轉成溫度碼，最小位元的4個碼使用二進位碼。為了更容易和數位系統整合，在此設計架構中之類比電路的電源電壓與數位電路的電源電壓是相同1.8V。同時，為了達到所需的靜態和動態特性而使用了很多技巧，例如：電流源電晶體開關的切換特性，電路佈局的最佳化，防止電源雜訊互相耦合的技巧等，來提升電路效能。

In this thesis, a 14-bit 100MHz segment digital-to-analog converter is proposed. It is implemented in UMC standard 0.18μm 1P6M CMOS technology. The segmented architecture current steering DAC are divided into three parts. First part is a 6bit MSB constructed by thermometer code structure. The second part is a 4bit MID constructed by thermometer code. At the last part is a 4bit LSB binary weighted one. For easier integration in the digital system, the power supply in the analog part and digital part is applied 1.8 volts. In designing digital-to-analog converter technical skills such as transistor switching timing scheme, layout optimization and power line decoupling are applied to achieve high performance of static and dynamic specifications.

摘要.......................................................................i
Abstract..................................................................ii
目錄.....................................................................iii
第一章 緒論.................................................................1
1-1 前言...................................................................1
1-2 研究動機與目的..........................................................1
1-3 章節說明................................................................2
第二章 數位類比轉換器基本架構.................................................3
2-1 理想數位類比轉換器.......................................................3
2-2 靜態參數、動態參數.......................................................4
    2-2-1 解析度(Resolution)................................................4
    2-2-2 偏移誤差(Offset Error)............................................4
    2-2-3 增益誤差(Gain Error)..............................................5
    2-2-4差動非線性誤差(Differential Nonlinearity Error, DNL)...............5
    2-2-5積分非線性誤差(Integral Nonlinearity Error, INL)...................6
    2-2-6 穩定時間(Settling time)...........................................7
    2-2-7 信號對雜訊比(Signal-to-Noise Ratio)...............................7
    2-2-8 信號對雜訊及諧波失真比(Signal-to-Noise and Distortion Ratio).......7
    2-2-9 SFDR(Spurious Free Dynamic Range)...............................8
    2-2-10 總諧波失真(Total Harmonic Distortion)...........................8
    2-2-11 有效位元數(Effective Number of Bits)............................8
2-3數位類比轉換器基本架構種類................................................8
    2-3-1 電組串聯式......................................................…9
    2-3-2兩級串列電阻式....................................................10
    2-3-3二進制碼權重電阻式.................................................10
    2-3-4 R-2R電阻階梯式…..................................................11
    2-3-5電容電荷重新分布式.................................................12
    2-3-6二進制碼權重電流切換式.............................................13
    2-3-7溫度計碼電流切換式.................................................15
第三章 溫度計碼與二進制碼權重式混合區段式數位轉類比轉換器設計....................17
3-1混合區段式數位轉類比轉換器架構............................................17
3-2混合區段式數位轉類比轉換器設計規格.........................................17
3-3混合區段式數位轉類比轉換器設計考量.........................................18
    3-3-1 SNDR與Mismatch之間的關係.........................................18
    3-3-2 MOS元件的Mismatch影響............................................21
    3-3-3 雜訊分析.........................................................23
    3-3-4 動態SFDR規格分析.................................................24
    3-3-5 動態SNDR規格分析.................................................26
    3-3-6 突波設計考量.....................................................28
          3-3-6-1 數位輸入控制訊號不同步現象.................................29
          3-3-6-2 電流源切換開關時同時關閉現象...............................30
    3-3-7 INL＆DNL分析.....................................................31
3-4電流源陣列佈局設計.......................................................33
    3-4-1 線性梯度誤差(Linear Gradient Error)..............................34
    3-4-2 拋物線梯度誤差(Parabolic Gradient Error).........................34
第四章 晶片佈局模擬結果.....................................................36
4-1 m+n+b位元混合區段電流導向式數位轉類比轉換器架構...........................…36
4-2電流源電路..............................................................37
4-3電流源偏壓電路..........................................................39
4-4二進制碼轉溫度計碼解碼電路................................................40
4-5高速栓鎖電路........................................................................43
4-6二進制碼權重式數位轉類比轉換器電路.........................................44
4-7模擬結果................................................................46
    4-7-1 動態特性模擬結果..................................................46
    4-7-2 靜態特性模擬結果..................................................51
4-8晶片佈局................................................................55
    4-8-1 電流源佈局.......................................................56
    4-8-2 二位元及三位元二進制碼轉溫度計碼數位控制電路佈局.....................59
4-9晶片佈局後的規..........................................................60
第五章 結論…………………………………………………………………………62
參考文獻…………………………………………………………………………….63

                                

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