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研究生: 吳奎霖
Kuei-Lin Wu
論文名稱: 針對層狀定向自組裝技術考慮雙重圖形和最小化短導引樣板之細部繞線
Lamellar DSA-aware Detailed Routing Considering Double Patterning and Short Template Minimization
指導教授: 方劭云
Shao-Yun Fang
口試委員: 呂學坤
Shyue-Kung Lu
陳勇志
Yung-Chih Chen
劉一宇
Yi-Yu Liu
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2022
畢業學年度: 111
語文別: 英文
論文頁數: 58
中文關鍵詞: 層狀定向自組裝技術細部繞線
外文關鍵詞: lamellar DSA, detailed routing
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  • Abstract iv List of Tables viii List of Figures ix Chapter 1. Introduction 1 1.1 Directed Self-Assembly 1 1.2 DSA with Self-Aligned Via 2 1.3 Motivation 3 1.4 Contributions 5 1.5 Thesis Organization 7 Chapter 2. Preliminaries 8 2.1 Design Constraints 8 2.2 Problem Formulation 9 Chapter 3. Lamellar DSA-aware Routing 11 3.1 Prerouting 11 3.1.1 Net Interaction Graph Construction 12 vi 3.1.2 Dense Graph Finding 13 3.1.3 ILP formulation for Dense Graph Trunk Assignment 16 3.1.4 Conflict Graph and Via Forbidden Map Construction 25 3.2 Short Template-aware Detailed Routing 38 3.2.1 Routing Graph Model 38 3.2.2 A* Search Cost Function 39 3.2.3 Rip-Up and Rerouting 40 3.3 Post Optimization 41 Chapter 4. Experimental Results 42 Chapter 5. Conclusion 46 Bibliography 47

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    [7] K.-L. Lin, and S.-Y Fang, “Guiding Template-aware Routing Considering Redundant Via Insertion for Directed Self-Assembly,” In Proc. ACM/IEEE Asia South Pacific Design Autom. Conf., pp. 170-175, Jan. 2017.
    [8] J. Ou, B. Yu, X. Xu, J. Mitra, Y. Lin, and D.-Z. Pan, “DSAR:DSA aware routing with simultaneous DSA guiding pattern and double patterning assignment,” In Proc. of ISPD, pp. 91-98, 2017.
    [9] H. -J. Yu, and Y. -W. Chang, “DSA-friendly detailed routing considering double patterning and DSA template assignments,” In Proc. of DAC, pp. 1-6, 2018.
    [10] IBM ILOG CPLEX Optimizer.
    http://www-01.ibm.com/software/integration/optimization/cplex-optimizer/
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    [12] T. -H. Cormen, C. -E. Leiserson, and R. -L. Rivest, “Introduction to Algo- rithms,” The MIT Press, 1990.

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