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研究生： 鄭三吉
Sanjeev - Jain
論文名稱： 雙頻帶壓控振盪器的頻漂應力試驗 和間接的背柵耦合四相位壓控振盪器
Poststress RF-Drifts of Dual Band VCOs and Indirect Back-Gate Coupling QVCO
指導教授： 張勝良
Sheng-Lyang Jang
口試委員: 黃進芳
Jhin-Fang Huang
莊敏宏
Miin-Horng Juang
學位類別： 博士
Doctor
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2013
畢業學年度： 101
語文別： 英文
論文頁數： 142
中文關鍵詞： Colpitts oscillators. 、poststress 、source degenerated QVCO 、QVCO 、0.18μm SiGe 3P6M 、MOS-coupled LC-tank 、BiCMOS
外文關鍵詞： BiCMOS, MOS-coupled LC-tank, 0.18μm SiGe 3P6M, QVCO, source degenerated QVCO, poststress, Colpitts oscillators.
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  •  上一筆

    • 无线射频设计总的趋势是发展中国家，从single-band/mode multi-band/mode系统在几个频段，支持多种标准。电压控制振荡器（VCO）是一种重要的动力只在所有的RF收发器组件，并负责产生LO信号用于频率合成，但涵盖了所有这些标准的一个压控振荡器（VCO）是难以实施的。试图实现多标准的VCO一直专注上实施宽带VCO具有双波段和多波段拓扑。
    首先，该芯片提出了一种双谐振互补的Colpitts建议作为工作在4.3和11.7 GHz的双频段振荡器的电压控制振荡器（VCO）。该VCO包括两个单端双谐振LC罐互补的Colpitts振荡器共享一个共同的可变电抗器切换LC谐振器。建议的VCO已经与台积电0.18微米1P6M CMOS技术实现核心功耗为3.60/3.96毫瓦在电源电压为1.2 V的VCO有图的优点-192.7/-189.4dBc/Hz在高/低乐队分别。的双频段压控振荡器，晶片面积是0.822×0.628平方毫米。
    第二，该芯片有两个子频带，提出了一种高性能的CMOS电压控制振荡器（VCO）。两对并联变容二极管用于切换高，低频段。奇模式作为模式切换的变容二极管，VCO工作在高频段和偶模式VCO工作在低频段。已建议的VCO TSMC的0.18μm1P6M CMOS技术实现，它可以产生5.21-6.66 GHz和3.26-3.84 GHz的频率范围内的差分信号，它也有低和高频率的频带的高输出电压的波动在。的双频段压控振荡器，晶片面积是0.976×1.092平方毫米。 2小时，重大射频参数漂移，强调在VDD = 2.5V电路被发现。在电源电压0.75V，高（低）带图的优点（FOM）-190.5（-190.4）DBC / HZ。
    第三，该芯片提出后的应力特性的双频带电压控制振荡器（VCO）。所设计的电路包括一个双谐振LC谐振器的Co​​lpitts负阻细胞。双谐振LC谐振器包括一个串联调谐的LC谐振器和一个并联谐振的谐振器。 VCO已经与台积电0.18微米1P6M CMOS技术实现。该VCO可以生成差分信号的频率范围为3.0∼3.37GHz和6.95∼7.40GHz 10.08mW，10.24mW直流漏极 - 源极偏置电压VDD为1.4V分别与核心功耗。双频段压控振荡器的管芯面积为0.485×0.800平方毫米。该电路在VDD = 3V操作8小时，并在射频参数显着的漂移被发现。
    第四，该芯片提出一个新的正交压控振荡器（QVCO），，它由两对芯交叉耦合的电压控制振荡器（VCO），使用间接的背栅耦合。拟议的CMOS QVCO与台积电的0.18微米SiGe 3P6M技术和已实施，裸片面积0.480×0.959平方毫米的。在电源电压为0.8V，消耗的总功率是4.4MW的项目。 10小时，重大射频参数漂移，强调该电路在VDD = 3V被发现。 QVCO自由运行频率可调从5.96 GHz至6.75 GHz的调谐电压范围从0.0V至2V。在1MHz频率偏移的测量相位噪声为-120.5 dBc / Hz的的振荡频率为6.59 GHz和品质因数（FOM）的建议QVCO的身影是-190.4 dBc / Hz的的。

    A general trend for wireless RF design is developing from single-band/mode to multi-band/mode systems that support multiple standards at several frequency bands. The voltage-controlled oscillator (VCO) is the crucial power hungry component in all RF transceivers and is responsible for generating the LO signal used for frequency synthesis, but a VCO covering all of those standards is difficult to implement. The attempts to realize multi-standard VCOs have been focused on the implementation of broadband VCO having dual-band and multiband topologies.
    First, this chip presents a dual-resonance complementary Colpitts voltage- controlled oscillator (VCO) which is proposed to serve as a dual-band oscillator operated at 4.3 and 11.7 GHz. The VCO consists of two single-ended dual-resonance LC-tank complementary Colpitts oscillators sharing a common varactor-switching LC resonator. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology and the core power consumption is 3.60/3.96 mW at the supply voltage of 1.2 V. The VCO has figure of merit -192.7/-189.4dBc/Hz at high/low band respectively. The die area of the dual-band VCO is 0.822× 0.628 mm2.
    Second, this chip presents a high-performance CMOS voltage-controlled oscillator(VCO) with two sub-frequency bands. Two pairs of shunt varactors are used to switch high- and low-frequency bands. With the varactors as the mode switches, the odd mode VCO operates at the high-band and the even mode VCO operates at the low-band. The proposed VCO has been implemented with the TSMC 0.18μm 1P6M CMOS technology and it can generate differential signals in the frequency range of 5.21-6.66 GHz and 3.26-3.84 GHz and it also has high output voltage swings at both low and high-frequency bands. The die area of the dual-band VCO is 0.976×1.092mm2. The circuit was stressed at VDD = 2.5V for 2 hours and significant drift in RF parameters was found. At the supply voltage of 0.75V, the high(low)-band figure of merit(FOM) is -190.5(-190.4) dBc/Hz.
    Third, this chip presents the post-stress characteristics of a dual-band voltage- controlled oscillator (VCO). The designed circuit consists of a dual-resonance LC resonator and a Colpitts negative resistance cell. The dual-resonance LC resonator comprises a series-tuned LC resonator and a parallel resonant resonator. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology. The VCO can generate differential signals in the frequency range of 3.0~3.37GHz and 6.95~7.40GHz with core power consumption of 10.08mW and 10.24mW at the dc drain-source bias VDD of 1.4V respectively. The die area of the dual-band VCO is 0.485×0.800 mm2. The circuit was operated at VDD = 3V for 8 hours and significant drift in RF parameters was found.
    Fourth, this chip presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two p-core cross-coupled voltage-controlled oscillators (VCOs) using indirect back-gate coupling. The proposed CMOS QVCO has been implemented with the TSMC 0.18μm SiGe 3P6M technology and the die area is 0.480×0.959mm2. At the supply voltage of 0.8V, the total power consumption is 4.4mW. The circuit was stressed at VDD = 3V for 10 hours and significant drift in RF parameters was found. The free-running frequency of the QVCO is tunable from 5.96 GHz to 6.75 GHz as the tuning voltage is varied from 0.0V to 2V. The measured phase noise at 1MHz frequency offset is -120.5 dBc/Hz at the oscillation frequency of 6.59 GHz and the figure of merit (FOM) of the proposed QVCO is -190.4 dBc/Hz.

    Abstract...........................................................................................................................I Acknowledgements......................................................................................................III Table of Content...........................................................................................................IV List of Figure................................................................................................................VI List of Table .................................................................................................................XI Chapter 1 Introdution.....................................................................................................1 1.1 Research Background.......................................................................................1 1.2 Thesis Organization 4 Chapter 2 Overview of the Voltage-Controlled Oscilllators..........................................6 2.1 Basic Theory of Oscillators..............................................................................6 2.2 Microwave Transistor Oscillation Conditions 10 2.2.1 Feedback Oscillators 10 2.2.2 One-port Negative-Resistance Oscillators 12 2.3 Classification of Oscillators 16 2.3.1 Ring Oscillator 16 2.3.2 LC-Tank Oscillator 21 2.4 RLC-Tank research 36 2.4.1 Quality Factor 37 2.4.2 Inductor and Transformer 39 2.4.3 Capacitors and Varactors 55 2.4.4 Resistors 61 2.5 Design Concepts of Voltage-Controlled Oscilator 62 2.5.1 Parameters of a Voltage-Controlled Oscilator 63 2.5.2 Phase Noise in Oscillator 65 2.5.3 Dual-Band VCO Design 72 Chapter 3 A Low Phase Noise Differential Dual-Resonance Complementary Colpitts VCO...............................................................................................77 3.1 Introduction....................................................................................................77 3.2 Circuit Design................................................................................................78 3.3 Measurement Results.....................................................................................82 Chapter 4 Dual-Band CMOS VCO Using the Shunt Varactor Switch.........................85 4.1 Introduction....................................................................................................85 4.2 Circuit Design................................................................................................88 4.3 Measurement Results 92 Chapter 5 Post-Stress RF-Drifts of Dual-band LC VCO in 0.18-μm CMOS Technology.........................................................................98 5.1 Introduction....................................................................................................98 5.2 Circuit Design ................................................................................................99 5.3 Measurement Results 104 Chapter 6 A Low Phase Noise Back Gate Coupled P-Core Quadrature LC-VCO.......................................................................................110 6.1 Introduction 110 6.2 Circuit Design 113 6.3 Measurement Results 116 Chapter 7 Conclusion 122 References..................................................................................................................124

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