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研究生: 陳彥廷
Yan-Ting Chen
論文名稱: 接受前導碼並回傳16位元隨機碼之CMOS被式 UHF RFID電路設計
Realization of the preamble detection and 16-bit random number backscatter circuits for a CMOS passive UHF RFID Tag
指導教授: 姚嘉瑜
Chia-Yu Yao
口試委員: 陳筱青
Hsiao-Chin Chen
彭盛裕
Sheng-Yu Peng
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2016
畢業學年度: 105
語文別: 中文
論文頁數: 93
中文關鍵詞: EPC global Class1 Generation2倍壓器被動式UHF RFID Tag
外文關鍵詞: EPC global Class1 Generation2, charge pump, passive UHF RFID tag
相關次數: 點閱:331下載:12
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  • 本論文為單頻段被動式UHF RFID Tag,依照EPC global Class‐1 Generation‐2 UHF RFID Protocol的規範所設計,UHF為860MHz ~ 960MHz,本論文應用頻段為925MHz,利用連續弦波訊號對RFID Tag進行充電,將交流訊號轉成直流訊號供應給整個電路,接收Preamble訊號並回傳RN16(16bits Random Number),將結果經過FM0編碼後利用Backscatter反散射回傳給RFID Reader。
    被動式RFID Tag由於沒有電源供應,因此低功耗設計非常重要,利用疊接式倍壓器將交流轉為直流儲存於電容,沒有使用穩壓器及震盪器,利用Low Power Voltage Reference電路取代穩壓器,邏輯閘與RC充放電代替震盪器,減少功率消耗,後模擬結果最低接收功率為-26dBm,量測結果最低接收功率-3dBm,本論文利用聯華電子(UMC) 0.18um 1P6M CMOS製程實現。


    This thesis presents a single-band passive UHF RFID tag chip. This design relies on the EPC global Class‐1 Generation‐2 UHF RFID Protocol. We use the UHF frequency at 925MHz. The 925MHz continuous wave charges the RFID Tag. Next, The tag receives the preamble signal from reader and backscatters the RN16(16-bit Random Number). The output signal is encoded by the FM0 encoder. The FM0 signal controls the switching the backscatter circuit to reflect and modulate the 925MHz CW wave back to the reader.
    Because a passive RFID tag doesn’t have a power supply, low power design is very important. We use stacked charge pump circuit to convert RF signal and store to DC energy power at off-chip capacitance. There is no regulator in the tag. In order to reduce the power consumption, we use a low power reference circuit to replace the regulator. In post-simulation, the input sensitivity can achieve -26 dBm. At the measurement, the input sensitivity can achieve -3 dBm. The proposed passive UHF RFID tag is fabricated in UMC 0.18um 1P6M CMOS process.

    致謝 摘要 Abstract 目錄 圖目錄 表目錄 第一章 緒論 1.1 簡介與背景 1.2 研究動機與目的 1.3 使用工具與模擬軟體 1.4 論文架構 第二章 RFID系統介紹 2.1 RFID系統使用頻段的選擇 2.2 RFID系統規範-EPC global Class-1 Generation-2簡介 2.3 RFID系統的通訊編碼與調變 2.3.1 ASK、FSK、PSK 2.3.2 OOK 2.3.3 PIE(Pulse-Interval Encoding) symbol編碼 2.3.4 FM0 symbol編碼 第三章 RFID Tag 電路設計 3.1 RFID Tag電路架構 3.2 第一部分:充電&解調電路 3.2.1 Charge Pump 電路 3.2.2 Limiter I&II and Power-on-reset 電路 3.2.3 Envelope Detector電路 3.2.4 Comparator電路 3.2.5 Voltage reference電路 3.3 第二部分:訊號處理電路 3.3.1 Delay Elements電路 3.3.2 Preamble Detector電路 3.3.3 Multivibrator電路 3.3.4 FM0 Encoder電路 3.3.5 Backscatter電路 第四章 模擬結果與晶片量測結果 4.1 Whole Chip Simulation Results I-Charging and Demodulation 4.1.1 The Lowest Input Power in Different Corners 4.1.2 The Medium Input Power in Different Corners 4.1.3 The Highest Input Power in Different Corners 4.2 Whole Chip Simulation Results II-Signal Processing 4.2.1 The Lowest Input Power in Different Corners 4.2.2 The Medium Input Power in Different Corners 4.2.3 The Highest Input Power in Different Corners 4.3 下線實作 4.3.1 設計流程 4.3.2 晶片佈局圖和腳位介紹 4.4 晶片量測結果 4.4.1 PCB電路板製作 4.4.2 量測環境 4.4.3 量測結果 4.4.4 量測檢討 4.5 與其它文獻比較 第五章 結論與未來展望 5.1 結論 5.2 未來展望 第六章 參考文獻

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