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研究生: 黃正翰
Cheng-Han Huang
論文名稱: 閘極絕緣層表面處理在低溫製程有機薄膜電晶體 特性改善之研究
Investigation on the Performance Improvement of Low Temperature Process Organic Thin Film Transistor by Surface Treatment of the Gate Insulator
指導教授: 范慶麟
Chin-Lin Fan
口試委員: 李志堅
Chih-Chien Lee
顏文正
Vicent Yen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2007
畢業學年度: 95
語文別: 中文
論文頁數: 106
中文關鍵詞: 有機薄膜電晶體原子力顯微鏡
外文關鍵詞: Organic Thin Film Transistors, AFM
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目前有機薄膜電晶體越來越收歡迎的原因為低溫製程、低製造成本、元件輕薄、製程簡單。應用於日常生活中之產品如無線射頻身份證、電子紙、電子標籤。若能提高其載子移動率與穩定性,在未來可作為驅動元件或開關之用。
雖然有機薄膜電晶體具有低溫製程、低製造成本、可製作在可撓曲之基板的好處,但它的高操作電壓及低電子移動率使得有機薄膜電晶體在能實際應用之前仍有相當的改進空間。本論文針對改善元件載子移動率提出新的表面處理方式:N2O電漿 (N2O-plasma)、 UV/Ozone、 UV/Ozone+hexamethyldisilazane (HMDS),本論文成功的以下接觸式結構 (bottom Contact) ,使用熱蒸鍍方式成長有機薄膜,在重摻雜矽基板上製作出以 pentacene 為主動層, SiO2 為閘極絕緣層,鉑/鉻為金屬電極的有機薄膜電晶體。為了符合有機元件低溫製程的趨勢,我們採用高密度電漿化學氣相沉積系統 (HDP-CVD) 製作之 SiO2 當為閘極絕緣層,我們發現以 HDP-CVD 製作之 SiO2 所完成之元件呈現出較差的特性。其電子移動率 μ = 7.69×10-3 cm2/V-s,起始電壓 Vt = - 11 V,ION/IOFF = 7.24×104,sub-threshold slope = 6.66 V/decade。 N2O-Plasma 、 UV/Ozone 、 UV/Ozone+HMDS 主要處理介電層表面,在 N2O-Plasma 處理方式中我們成功地改善元件特性。其電子移動率 μ = 1.17×10-2 cm2/V-s,起始電壓 Vt = - 8 V ,開關電流比 ION/IOFF = 5.50×105 ,次臨界斜率 sub-threshold slope = 6.33 V/decade。
我們利用原子力顯微鏡(Atomic Force Microscope, AFM )觀察晶粒狀態,半導體參數分析儀 (HP4156A) 做電性量測分析。雖然利用表面處理方式能夠改善元件電性,但是,有機薄膜電晶體的特性仍然有待進一步改善。


Organic thin-film transistors (OTFTs) have attracted much attention by the low temperature process, low cost, simple process,etc. For product application : RFID, electronics paper, electronics tag etc. If we improve the low electron mobility and stability, it can be applied to driving device or switch in the future.
Although organic thin film transistors have the advantages of low cost, low manufacturing temperature, being able to fabricated on flexible substrate, they suffers from high operating voltages and low electron mobility. These problems with the organic thin film transistors make them yet apply to practical applications. In this thesis, we successfully fabricated organic thin film transistors on the Si substrate with SiO2 Oxide as gate dielectric. In which, evaporated pentacene is used as the active layer, Pt/Cr is used as the Source/Drain . SiO2 Oxide is manufactured by HDP-CVD in order to conform low temperature process trend, but we got bad performance. An electron mobility of μ = 7.69×10-3 cm2/V-s, a threshold voltage of Vt = - 11 V, an ION/IOFF ratio of 7.24×104, and a sub-threshold slope of 6.66 V/decade are obtained. We use novel process N2O-plasma, UV/Ozoneand UV/Ozone+hexamethyldisilazane (HMDS) to improve performance. N2O-plasma treated oxide surface and then we improved electron mobility of μ = 1.17×10-2 cm2/V-s, Vt = - 8 V, ION/IOFF = 5.50×105, S.S = 6.33 V/decade, successfully. Using Atomic Force Microscope (AFM) and HP4156A to analyze grain size, grain boundary and electronic characteristic. Although we improve device performance by surface treatment, properties of organic thin film transistor need further improved in the future.

中文摘要I 英文摘要III 誌 謝V 目錄索引VII 圖 索 引IX 表 索 引XIII 第一章 序論1 1-1 研究背景1 1-2 研究動機與方向4 1-3 論文大綱6 第二章 有機電晶體介紹9 2-1 有機半導體材料特性&介紹9 2.1.1 Pentacene材料特性介紹11 2-2 有機半導體傳導機制12 2.2.1 Hopping14 2.2.2 Multiple Trapping and Release(MTR)14 2-3 有機薄膜電晶體結構介紹15 2.3.1 有機薄膜電晶體製程開發18 2-4 有機薄膜電晶體的操作模式20 2-5 有機薄膜電晶體參數之粹取22 2.5.1 載子移動率(Mobility μ)22 2.5.2 臨界電壓(Threshold Voltage VT)23 2.5.3 次臨界斜率(Subthreshold Slope S.S)24 2.5.4 開關電流比(On/Off current ratio)24 第三章 實驗方法與步驟36 3-1 元件製作流程36 3-2 元件結構40 3-3 元件量測41 第四章 實驗結果與討論48 4.1 元件尺寸對元件特性之影響48 4.1.1 使用 高溫爐管 成長之 OXIDE製作OTFT48 4.1.2 使用HDP-CVD 成長之 OXIDE製作OTFT49 4.2 使用UV-Ozone 改善元件特性51 4.2.1 主動層晶粒大小探討51 4.2.2 元件電性量測與分析52 4.3 使用UV-Ozone+HMDS 改善元件特性53 4.3.1 主動層晶粒大小探討53 4.3.2 元件電性量測與分析54 4.4 使用N2O Plasma改善元件特性55 4.4.1 主動層晶粒大小探討55 4.4.2 元件電性量測與分析56 第五章 結論與未來展望100 5.1 結論100 5.2 未來工作102 參考文獻103

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