本論文係有關二值化文件影像旋轉演算處理器之軟/硬體整合設計與驗證，相關研究工作包含四大部分：
第一部份為二值化文件影像旋轉演算法之軟體設計，在分析其優缺點並考量嵌入式硬體資源的限制後，發展出以視窗為處理單位之視窗式反向對映線性內插旋轉演算法。
第二部份為設計與實現視窗式反向對映線性內插旋轉演算法之演算處理器，同時使用雙倍資料傳輸率同步動態記憶體以儲存完整影像，因此處理器的設計包含了參考影像提取單元、旋轉與內插處理單元、目的影像資料儲存單元以及雙倍資料傳輸率同步動態記憶體控制器。最後，將以上設計之硬體整合於SOPC系統中，並以Altera FPGA開發板實現之。
第三部份是撰寫演算處理器之相關驅動程式，再使用RPC-based驗證系統來驗證其功能。
第四部份是演算處理器之驗證、效能評估與執行效能。
整體而言，本論文係以研究二值化文件影像旋轉演算法與設計其處理器為目標，並將其實作於FPGA開發板上。經各種不同的影像與旋轉角度實驗，證實本論文所發展的演算法有極佳的效果，其相關之軟/硬整合設計方法，亦可改善演算處理器設計與驗證流程之效率。

This thesis is related to the hardware/software co-design and verification of an algorithmic processor for binary document image rotation. The research work includes four parts:
The first part is about software design of the rotation algorithm for binary document images. After analyzing the advantages and disadvantages of these algorithms and considering about the limited resources in the embedded hardware, a window-based rotation algorithm which uses inverse mapping and linear interpolation has been developed.
The second part is to design and implement an algorithmic processor for the window-based rotation algorithm mentioned above. It stores full binary document images in DDR SDRAM. Therefore the processor consists of reference-region fetch unit, rotation-interpolation unit, destination-data store unit, and DDR SDRAM controller. Finally, the above hardware modules are integrated into an SOPC-based system and implemented on an Altera FPGA development board.
The third part is to write the related drivers for the algorithmic processor. Then the function of the algorithmic processor is verified through using a RPC-based verification system.
The fourth part is about the verification and evaluation of the run-time performance of the algorithmic processor.
On the whole, the goal of this thesis is to do researches on the development of a rotation algorithm for binary document images. Then the related algorithmic processor is developed and implemented on the FPGA development board. After being verified by using various images and rotation angles, the algorithm developed in this thesis has shown very good performance for binary document image rotation. Meanwhile, it also shows that the hardware/software co-design method presented can improve the efficiency of both the design and verification flows.

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