本論文係關於較佳方向評估邊緣檢測演算處理系統之軟/硬體整合設計與實現，相關研究工作包含四大部分：
第一部分為較佳方向評估邊緣檢測演算法之軟體設計，分析演算法之特性以及探討其方向評估的準確性，並以 C 語言撰寫程式來驗證其功能之正確性。
第二部分為設計與實現較佳方向評估邊緣檢測演算處理器，其包含控制單元、高斯模組、影像邊緣檢測模組以及中值濾波模組。最後，將設計整合於可程式化單晶片系統中，並以Altera FPGA開發板實現之。
第三部分為演算處理系統軟/硬體整合設計之實現與驗證，係使用NIOS II IDE開發相關軟韌體程式，以進行其功能之驗證與分析。
第四部分則是進行演算處理器之效能評估。
整體而言，本論文係以研究較佳方向評估邊緣檢測演算法並設計與實現其演算處理系統為目標，同時將其實現於 Altera FPGA 開發板上，以證實本論文所發展之演算法與硬體處理器有極佳的效能。

This thesis is related to the hardware/software codesign and implementation of an edge-detection algorithmic processor which has better direction estimation. The related research work includes four parts:
The first part includes the software design of an edge-detection algorithm with better direction estimation, the analysis of the algorithm to explore the accuracy of its direction estimation, and the verification of the correctness of the algorithm by using the C program.
The second part is to design and implement an algorithmic processor for the edge-detection algorithm which includes control unit, Gaussian module, image edge-detection module and median filter module. Finally, the design is integrated and implemented on an Altera FPGA development board.
The third part is about the realization and verification of the software/hardware design of an algorithmic processing system. The NIOS II IDE is used to develop the relevant software and firmware to verify and analyze its function.
The fourth part is to evaluate the performance of the algorithmic processor.
Overall, the goals of this thesis are to do research on an edge-detection algorithm with better direction estimation and to design and implement its algorithmic processing system. Meanwhile, this algorithmic processing system has been implemented on an FPGA development board to compare and prove that the algorithm and the hardware processor developed in this thesis have nice performance.

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