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研究生： 劉政辰
Cheng-Chen Liu
論文名稱： 新式互補式金氧半壓控振盪器與注入鎖定除頻器之設計
Design of Novel CMOS Voltage Controlled Oscillators and Injection Locked Frequency Dividers
指導教授： 張勝良
Sheng-Lyang Jang
口試委員: 徐敬文
Ching-Wen Hsue
黃進芳
Jhin-Fang Huang　
馮武雄
Wu-Shiung Feng
陳凰美
Hwan-Mei Chen
楊賜麟
Su-Lin Yang
莊昀學
Yunh-Sueh Chuang
學位類別： 博士
Doctor
系所名稱： 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年： 2010
畢業學年度： 98
語文別： 英文
論文頁數： 106
中文關鍵詞： 壓控振盪器 、相位雜訊 、直接注入鎖定除頻器 、鎖頻範圍 、互補式金氧半電晶體 、混頻器
外文關鍵詞： voltage-controlled oscillator, phase noise, injection-locked frequency divider, CMOS, mixer
相關次數： 點閱：239  下載：3 
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    • 壓控振盪器與除頻器是頻率合成器電路中，主要的電路之一。對壓控振盪器而言，低相位雜訊可避免相鄰雜訊訊號經由混波轉換的干擾，經由壓控振盪器的優質指數來判斷振盪器性能的優劣。而振盪器的輸出則經由除頻器來達成降頻的工作，因此，除頻器需具有高頻操作，寬的操作頻寬及低功率消耗。
    首先，本論文呈兩個優質指數佳的LC-tank差動壓控振盪器，一個3.85GHz差動壓控振盪器利用電感回授方式達到低功耗效果，其功率消耗為2.1 mW且調變範圍為13.5 %，其輸出之相位雜訊在距離載波頻率1MHz處所量測之結果可達-120.02 dBc/Hz，其優質指數為-188.5 dBc/Hz。另一個17 GHz差動壓控振盪器，在其電晶體之基底端給一正負偏壓來調整振盪器的操作頻率，在正偏壓值的最佳點，它的優質指數為-189.51 dBc/Hz，在負偏壓值的最佳點，它的優質指數為-191.55 dBc/Hz。
    注入鎖定技術可達到高頻操作及低功率損耗的功能。基於此技術，呈現三個可應用於寬鎖定範圍的注入鎖定除頻器。第一，實現一個寬鎖定範圍之除三注入鎖定除頻器，其鎖定之操作範圍可從29.96 GHz到34.9 GHz，其功率消耗為1.96 mW。第二，實現一個多模除數之主動混波器的寬注入鎖定除頻器，其除二的注入鎖定範圍是61.2%，其功率消耗為5.94 mW。最後實現一個低功耗且寬鎖頻之除二注入鎖定除頻器，其鎖定範圍9 GHz，其功率消耗為3.85 mW。

    The key building blocks in the frequency synthesizer are the voltage controlled oscillator (VCO) and the high frequency divider circuit. Most importantly, low phase-noise is required to avoid corrupting the mixer-converted signal by close interfering tones for VCO circuit, and the Figure of Merit (FOM) of VCO can be determined by it’s performance. The output of the VCO is divided down by the frequency divider which requires operating at high frequencies, wide operating range and lower power consumption.
    First, this thesis describes two differential VCOs with better FOM. A 3.85 GHz differential VCO uses transformer feedback to achieve a low power. The power consumption is 2.1 mW, the tuning range is 13.5 %, a phase noise of -120.02 dBc/Hz at 1 MHz frequency offset is found, and the FOM is -188.5 dBc/Hz. The second circuit is a 17 GHz differential VCO which uses positive / negative bias to the body terminal of transistor in order to change the operation oscillation frequency of VCO. At an optimum positive bias, VCO’s FOM is -189.51 dBc/Hz. The VCO’s FOM is -191.55 dBc/Hz at the condition of the optimum negative bias.
    The injection locking technique is applied in high speed, low power frequency dividers, namely injection locked frequency dividers (ILFDs). Based on this technique, three ILFDs are presented for wide locking range application. First, a wide locking range divider-by 3 ILFD is accomplished and the locking range is from 29.96 GHz to 34.9 GHz with the power consumption of 1.96 mW. Second, a multi-division ratio ILFD uses active mixer to achieve a wide injection locking range, and the locking range is 61.2% at divider-by 2 mode with the power consumption of 5.94 mW. Finally, a divide-by-2 ILFD with low voltage and wide locking range is proposed, the total locking range is 9 GHz with power consumption of 3.85 mW.

    中文摘要 I Abstract II 誌 謝 IV Table of Contents V List of Figures VII List of Tables X Chapter 1 Introduction 1 1.1 Motivation 1 1.2 Thesis Organization 4 Chapter 2 Overview of the Voltage-Controlled Oscillators 5 2.1 Introduction 5 2.2 Basic Theory of Oscillators 6 2.3 Classification of Oscillators 10 2.3.1 Ring Oscillator 10 2.3.2 LC-Tank Oscillator 11 2.4 Inductor and Varactor Design in VCO 14 2.4.1 Inductor Design 14 2.4.2 Varactor Design 22 2.5 Important Parameters of VCO 26 2.5.1 Phase Noise 27 2.5.2 Tuning Range 29 2.5.3 Figure of Merit (FOM) 30 Chapter 3 Design of Voltage-Controlled Oscillators 31 3.1 A Low Power Armstrong VCO 31 3.1.1 Design of Differential Armstrong VCO 32 3.1.2 Measurement and Discussion 36 3.2 A CMOS Colpitts VCO Using Reverse- and Forward-Biased Diode Tuning 40 3.2.1 Design of Differential Colpitts VCO 40 3.2.2 Measurement Results 43 3.3 Summary 48 Chapter 4 Design of Injection-Locked Frequency Dividers 50 4.1 Principle of Injection-Locked Frequency Divider 51 4.1.1 Locking Range 52 4.1.2 ILFD’s Fundamental Block Diagram 55 4.1.3 ILFD’s Noise 56 4.2 Active/Passive Mixer Description 61 4.2.1 Active Mixer 61 4.2.2 Passive Mixer 63 4.3 A Low Power Divide-By-3 ILFD 64 4.3.1 Proposed Divide-By-3 ILFD 65 4.3.2 Measured Results 68 4.4 A Variable Division Ratio ILFD Based on Active Mixer 72 4.4.1 Design of the Mixer-VCO Core ILFD 73 4.4.2 Measured Results 76 4.5 An ILFD Based on Passive Mixer 82 4.5.1 Circuit Design 83 4.5.2 Measurement Results 85 4.6 Summary 88 Chapter 5 Conclusions 90 References 93 Publications 101 Journal Papers 101 Conference Papers 103 Patents 105 Author’s Brief Introduction 106

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