由於應用範圍非常的廣泛，複晶矽(polysilicon)薄膜電晶體(TFT)已經被研究很多年，例如記憶體、主動示液晶顯示器和數位相機等，原因是低溫複晶矽薄膜電晶體具有很高的電子移動率(field effect mobility)。然而，傳統的自我對準型(self-aligned)的複晶矽薄膜電晶體的電特性上卻存在了幾個不欲發生的效應，包括大的關閉狀態(off-state)的電流，紐結效應(kink effect)和熱載子引起電性操作上的不穩定性。為了改善元件特性，我們將分析使用了異質結構複晶矽/碳化矽(silicon carbide)的薄膜電晶體。
在本論文中，我們將經由模擬來探討異質結構薄膜電晶體，一開始會討論傳統型單一汲極/源極的複晶矽和碳化矽薄膜電晶體。我們發現由於碳化矽的能隙（bandgap）比矽大，複晶碳化矽薄膜電晶體可以有效抑制漏電流(leakage current)，但同時也會增加啟始電壓(threshold voltage)。接著改變不同複晶矽和碳化矽的厚度，研究兩種材質的厚度對元件特性的影響。另外為了改善異質結構薄膜電晶體啟始電壓過大的缺點，也會試著改變通道的摻雜濃度。
最後我們會調整元件的通道長度和閘極(gate)氧化層厚度，由模擬結果可以發現當通道長度縮短或閘極氧化層厚度減少時，傳統型薄膜電晶體的漏電流會大量增加，而異質結構薄膜電晶體的漏電流只有少量的增多。

Polysilicon thin film transistors (poly-Si TFTs) have been investigated for their extensive applications on memory devices, active matrix liquid crystal displays (AMLCDs) and digital cameras. It’s because the electron mobility of ploy-Si TFTs is about 100 times larger than that of amorphous TFTs However, conventional self-aligned polysilicon TFTs present several undesired effects in the electrical characteristics, including large off-state currents (leakage), kink effect and hot carrier instabilities. In order to improve the electrical properties of poly-Si TFTs, the heterostructure Poly-Si/SiC TFTs are employed.
In this thesis, heterostructure TFTs were studied by simulation. The conventional single source/drain poly-Si and poly-SiC TFTs are discussed first. Because the bandgap of SiC is larger than that of Si, poly-SiC TFTs show low leakage current and high threshold voltage. Next, the thickness of poly-Si and ploy-SiC is changed to study its influence to device characteristics. In addition, the channel doping concentration is also changed for reducing the threshold voltage.
Finally, TFTs mentioned above of various channel length and gate oxide thickness is investigated. From the results of simulation, it’s found that the leakage current of poly-Si TFTs is increased strictly and the leakage current of heterostructure TFTs is increased slightly when the channel length and gate oxide thickness is decreased.

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