研究生: |
黃偉鈐 Wei-Chien Huang |
---|---|
論文名稱: |
使用色散延遲線設計微型化威爾金森功率分配器 Design of Miniaturized Wilkinson Power Divider Using Dispersive Delay Line |
指導教授: |
徐敬文
Ching-Wen Hsue |
口試委員: |
張勝良
none 黃進芳 none 陳國龍 none 溫俊瑜 none |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2016 |
畢業學年度: | 104 |
語文別: | 中文 |
論文頁數: | 60 |
中文關鍵詞: | 威爾金森功率分配器 |
外文關鍵詞: | wilklinson power divider |
相關次數: | 點閱:150 下載:0 |
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藉由使用色散延遲傳輸線DDL(Dispersive Delay Line)的技術,加入其互補式殘段槽線結構(complementary microstrip-slotline stub structure),將其應用在威爾金森功率分配器WPD(Wilkinson Power Divider)上,實現達成設計微小化之目的。
In this thesis, the miniaturized Wilkinson Power Divider is presented by using the technology of DDL(Dispersive Delay Line). The DDL consists of a symmetrical open stub and its non-coplanar complementary slot line. The advantage of the method is reducing the substrate area and obtaining the same all-pass result as possible.
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