隨著科技的發展與進步，越來越多的新指令集架構(ISA，instruction set architecture)被提出。例如RISC-V。在不同的架構中即使有相同名稱的格式、指令、暫存器其背後的定義有可能是截然不同的，因此要開發或移植到新的指令集架構必須要重新再花一次時間去瞭解新的架構。
LLVM Project是一個開源專案，它是可模組化可重用編譯器與工具鏈技術的集合，LLVM Project因其模組化可重用越來越受歡迎，如何更加快速的開發或移植LLVM後端是一個重要的議題。
本篇論文採用OpenBlocks為基礎的圖形介面工具，我們的圖形化介面工具是LLVM TDBlock，它可以產生LLVM後端開發中不同架構皆所需要的target description file，使用LLVM TDBlock只需拉出單一程式區塊或是將指令進行配對即可產生所需的目標描述檔內容以減少開發者的開發時間。
本篇論文主旨在於研究各種不同的架構以及如何撰寫出不同架構的target description files，讓我們的圖形化介面工具LLVM TDBlock可以幫助使用者建立多平台的target description files，本篇論文以實作RISC-V的整數指令集與MIPS的整數指令集在LLVM TDBlock上並且作為範例，展示我們的工具在移植新架構上的便利性，並且進行各種實測來保證正確性。

With advances in science and technology, more and more new architectures are proposed, such as RISC-V. In different architectures, the definition of registers , formats and instructions is totally different even if they have the same name. Therefore, developers spend a lot of time again to know new architectures for development or porting.
LLVM is a open source project and it’s modular and reusable. This is the reason that it’s getting popular. How to implement LLVM backend fast is an important issue.
LLVM TDBlock is based on OpenBlocks, Our tool can generate target description files for multiple platforms. Users only need to drag a block to workspace or drag one block from target and the other one from LLVMIR to be a pattern. Our tool can help developers reduce time of development.
Main ideas of this thesis are researching different architectures and how to generate target description files for multiple platforms. we implement integer instruction set of RISC-V and MIPS as instances in LLVM TDBlock. These two instances demonstrate convenience of porting to another platform by using LLVM TDBlock. Moreover, we do a lot of experiments to ensure the correctness.

[1] Jozef Kolek, Zoran Jovanović, Nenad Šljivić, Dragan Narančić, “Adding microMIPS Backend to the LLVM Compiler Infrastructure” in Telecommunications Forum, 2013

[2] Jun-Jie Zhan, LLVM TDBlock : GUI Programming Tool for LLVM Target Description, Oct. 13, 2017

[3] Sheng-Jie Chen, GUI Tool to Support LLVM Target Description for RISC-V Extension Instruction Set, 2019

[4] Jia-Cheng Yang, A graphical Programming Tool for RISC-V Extension Instruction Set, 2019

[5] TableGen https://llvm.org/docs/TableGen/

[6] Andrew Waterman1, Krste Asanovi´c. The RISC-V Instruction Set Manual Volume I: Unprivileged ISA Document Version 20180801-draft https://inst.eecs.berkeley.edu/~cs152/sp19/handouts/sp19/riscv-spec-rvv-v0p4.pdf

[7] MIPS® Architecture for Programmers Volume II-A: The MIPS32® Instruction Set Manual Document Number: MD00086 Revision 6.06 December 15, 2016 https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf

[8] Eric Klopfer, Daniel Wendel, Ricarose Roque, Corey McCaffrey, Lunduo Ye, Aidan Ho, Brett Warne, Xudan Liu, Hout Nga, “MIT OpenBlocks,”https://github.com/mikaelhg/openblocks

[9] StarLogo TNG.http://education.mit.edu/portfolio_page/starlogo-tng/

[10] David Li, He Qichen,“ArduBlock,”https://github.com/taweili/ardublock, 2011

[11] CPU SPEC2017 https://www.spec.org/cpu2017/