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研究生: 黃麟翔
LIN-SIANG HUANG
論文名稱: 被動式射頻辨識晶片
Passive RFID Tag Design
指導教授: 陳筱青
Hsiao-Chin Chen
口試委員: 邱弘緯
Hung-Wei Chiu
陳雅淑
Ya-Shu Chen
學位類別: 碩士
Master
系所名稱: 電資學院 - 電機工程系
Department of Electrical Engineering
論文出版年: 2011
畢業學年度: 99
語文別: 中文
論文頁數: 87
中文關鍵詞: 電荷幫浦射頻轉直流電路參考電壓電路被動式RFID電子標籤反散射PIE symbol
外文關鍵詞: Charge Pump, RF to DC, Voltage Reference, Passive RFID Tag, Backscatter, PIE symbol
相關次數: 點閱:263下載:8
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  • 本論文利用UMC 90 nm CMOS製程,設計操作頻率為905 MHz之射頻轉直流電路與解調變電路,兩者電路主要應用於被動式RFID電子標籤架構中,其功能為提供直流電壓和解調訊號。在實驗模擬上最低輸入功率、輸出電壓與最佳功率轉換效率分為-15 dBm、1.25 V及4.9 %;測量結果分別為 -10 dBm、1.08 V及1 %;資料傳輸速率範圍為16.6 Kbps ~ 25 Kbps;該晶片面積為0.46×0.52 mm^2。
    905 MHz被動式RFID電子標籤使用TSMC 0.18um CMOS製程實現,並利用Native CMOS元件之零臨界電壓特性,以建構三階電荷幫浦作為射頻轉直流電路核心,進而提高功率轉換效率。該Tag之射頻轉直流電路最低輸入功率、輸出電壓與最高功率轉換效率分為-20dBm、0.59 V及26.7 %;測量結果分別為 -1 dBm、0.7 V及0.49 %;此晶片面積為0.52×0.62 mm^2


    In this study, the approach to design RF to DC and demodulator which both have 905MHz operation frequency is the process of the UMC 90 nm CMOS. The functions of those are to provide DC voltage and demodulate signal in the structure of Passive RFID Tag application. Through the simulation, the minimum input power, output voltage, and the maximum power efficiency are -10 dBm, 1.08 V, and 4.9% respectively. The measurements of the chip, which sizes 0.46×0.52 mm^2, are -10 dBm, 1.08 V, and 1%. Moreover, the range of the data rate is 16.6 Kbps to 25 Kbps.
    TSMC 0.18um CMOS process is use to accomplish 905 MHz Passive RFID Tag. To enhance the power efficiency, the property of zero threshold voltage of native CMOS device is used to establish the three-stage charge pump as the core of the RF to DC. The minimum input power, output voltage, and the maximum power efficiency of the tag’s RF to DC are -20 dBm, 0.59V, and 26.7% respectively. In additionally, the measurements of the chip, which area is 0.52×0.62mm^2, are -1dBm, 0.7 V, and 0.49%.

    摘要i Abstract ii 誌謝iii 目錄iv 圖目錄vii 表目錄xii 第一章 緒論1 1-1 簡介 1 1-2 研究動機2 1-3 RFID工作原理4 1-4 訊號調變6 1-5 通訊編碼8 參考文獻 10 第二章 射頻類比電路設計11 2-1 RFID電子標籤 11 2-2 射頻轉直流電路(RF to DC)12 2-2-1電荷幫浦(Charge pump) 12 2-2-2限制電路(Limiter)與參考電壓電路(Voltage reference)15 2-2-3穩壓電路(Regulator)17 2-3 解調變電路(Demodulator18 2-4 振盪器(Oscillator20 2-5 重置電路(Power On Reset)21 2-6 調變電路(Modulator)22 2-7 模擬結果23 2-7-1電荷幫浦(前模擬)24 2-7-2限制電路與參考電壓電路(前模擬) 26 2-7-3穩壓電路(前模擬)27 2-7-4射頻轉直流電路(後模擬)28 2-7-5解調變電路29 2-7-6振盪器30 2-7-7重置電路31 2-7-8調變電路31 2-7-9整體類比電路模擬結果32 2-8模擬結果與參考文獻比較33 參考文獻38 第三章 射頻類比電路設計39 3-1 8bit數位電路之設計概念 39 3-2 數位電路之設計流程40 3-3 數位電路之模擬結果42 3-4 整體電路前模擬結果45 3-5 整體電路後模擬結果49 參考文獻 52 第四章 量測結果53 4-1-1 測量電路之架構(UMC 90nm CMOS)53 4-1-2 測量功率匹配53 4-1-3 RF to DC &Demodulator 量測結果54 4-2 Tag量測結果(TSMC 0.18 m CMOS)58 4-3 量測總結與參考文獻比較64 參考文獻 66 第五章 結論與討論67 作者簡介68  

    CH1:
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    [2].Y. Hong et al., “Design and Challenges of Passive UHF RFID Tag in 90nm CMOS Technology,” Proc. of IEEE EDSSC, pp.1-4, May. 2008.
    [3].J.-P. Curty et al., “Remotely Powered Addressable UHF RFID Integrated System,” IEEE Journal of Solid State Circuits, vol. 40, no. 11, pp.2193-2202 Nov. 2005.
    [4].U. Karthaus and M. Fischer, “Fully Integrated Passive UHF RFID Transponder IC With 16.7W Minimum RF Input Power,” IEEE Journal of Solid State Circuits, vol. 38, no. 10, pp. 1602-1608, Oct. 2003.
    [5].Y. Yao, Y. Shi and F. F. Dai, “A Novel Low-power Input-Independent MOS AC/DC Charge Pump,” Proc. of IEEE ISCAS, vol.1, pp. 380-383, May. 2005.
    [6].M.-L. Hsia, Y.-S. Tsai, and T.-C. Chen, “An UHF Passive RFID Transponder Using A Low Power Clock Generator without Passive Components,” Proc. of IEEE MWSCAS, pp.11-15, Jul. 2007.
    [7].顧寶文,「900 MHz 8位元被動式CMOS RFID Tag晶片設計」國立台灣科技大學電機工程系研究所碩士論文,2009。
    [8].陳澤源,「915 MHz射頻辨識系統之被動式標籤電路實現」國立台灣大學電子工程研究所碩士論文,2008。
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    CH2:
    參考文獻
    [1].Y. Hong et al., “Design and Challenges of Passive UHF RFID Tag in 90nm CMOS Technology,” Proc. of IEEE EDSSC, pp.1-4, May. 2008.
    [2].J.-P. Curty et al., “Remotely Powered Addressable UHF RFID Integrated System,” IEEE Journal of Solid State Circuits, vol. 40, no. 11, pp.2193-2202 Nov. 2005.
    [3].U. Karthaus and M. Fischer, “Fully Integrated Passive UHF RFID Transponder IC With 16.7W Minimum RF Input Power,” IEEE Journal of Solid State Circuits, vol. 38, no. 10, pp. 1602-1608, Oct. 2003.
    [4].Y. Yao, Y. Shi and F. F. Dai, “A Novel Low-power Input-Independent MOS AC/DC Charge Pump,” Proc. of IEEE ISCAS, vol.1, pp. 380-383, May. 2005.
    [5].M.-L. Hsia, Y.-S. Tsai, and T.-C. Chen, “An UHF Passive RFID Transponder Using A Low Power Clock Generator without Passive Components,” Proc. of IEEE MWSCAS, pp.11-15, Jul. 2007.
    [6].顧寶文,「900 MHz 8位元被動式CMOS RFID Tag晶片設計」國立台灣科技大學電機工程系研究所碩士論文,2009。
    [7].陳澤源,「915 MHz射頻辨識系統之被動式標籤電路實現」國立台灣大學電子工程研究所碩士論文,2008。
    [8].廖芳仁,「無線生醫監測電路之晶片組」國立台灣大學電子工程研究所碩士論文,2005。
    [9].B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw Hill, 2001.
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    [12].Cheng, D.K.,Field and Wave Electromagnetics, Addison Wesley New York, 1989
    CH3:
    [1].M.-L. Hsia, Y.-S. Tsai, and T.-C. Chen, “An UHF Passive RFID Transponder Using A Low Power Clock Generator without Passive Components,” Proc. of IEEE MWSCAS, pp.11-15, Jul. 2007.
    [2].顧寶文,「900 MHz 8位元被動式CMOS RFID Tag晶片設計」國立台灣科技大學電機工程系研究所碩士論文,2009。
    [3].陳澤源,「915 MHz射頻辨識系統之被動式標籤電路實現」國立台灣大學電子工程研究所碩士論文,2008。
    CH4:
    參考文獻
    [1].Y. Hong et al., “Design and Challenges of Passive UHF RFID Tag in 90nm CMOS Technology,” Proc. of IEEE EDSSC, pp.1-4, May. 2008.
    [2].J.-P. Curty et al., “Remotely Powered Addressable UHF RFID Integrated System,” IEEE Journal of Solid State Circuits, vol. 40, no. 11, pp.2193-2202 Nov. 2005.
    [3].U. Karthaus and M. Fischer, “Fully Integrated Passive UHF RFID Transponder IC With 16.7W Minimum RF Input Power,” IEEE Journal of Solid State Circuits, vol. 38, no. 10, pp. 1602-1608, Oct. 2003.
    [4].Y. Yao, Y. Shi and F. F. Dai, “A Novel Low-power Input-Independent MOS AC/DC Charge Pump,” Proc. of IEEE ISCAS, vol.1, pp. 380-383, May. 2005.
    [5].陳澤源,「915 MHz射頻辨識系統之被動式標籤電路實現」國立台灣大學電子工程研究所碩士論文,2008。

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