研究生: |
杭宣佑 Xuan-You Hang |
---|---|
論文名稱: |
寬鎖頻範圍鎖定除四除頻器與低功耗相位雜訊壓控震盪器之研究 Design of wide locking range divide-by-4 LC injection-locked frequency divider and Low-Power and Low-Phase Noise Voltage-Controlled Oscillator |
指導教授: |
徐敬文
Ching-Wen Hsue 張勝良 Sheng-Lyang Jang |
口試委員: |
馮武雄
none 黃進芳 none |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2015 |
畢業學年度: | 103 |
語文別: | 英文 |
論文頁數: | 95 |
中文關鍵詞: | 壓控振盪器 、注入鎖定除頻器 |
外文關鍵詞: | voltage-controlled oscillator, injection-locked frequency divider |
相關次數: | 點閱:219 下載:0 |
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此論文提出了三個電路,第一個是一個寬鎖頻範圍鎖定除四除頻器,第二是一個低電壓相位雜訊壓空震盪器,最後是一個合併雙頻注入鎖定除二除頻器,三者皆使用了標準台積電0.18微米製程去實現。
在大範圍鎖定除四除頻器中,此電路包含由兩個N型金氧半電晶體交錯耦合對為中心所組成的壓控振盪器以及一個用來注入訊號的N型金氧半電晶體並聯共振腔電感所組成。量測結果顯示在注入訊號0 dBm時,其鎖定範圍是從12.3 GHz 到 15.5 GHz,而其消耗功率在供應電壓1.5 V之下只有13.87 mW。
在低電壓相位雜訊壓控震盪器裡,在供應電壓0.7V時,振盪器在6.1GHz時相位雜訊為-119.72dBc/Hz,FOM是-192.41dBc/Hz.功耗為1.242 mW.可調範圍由6.13到6.31GHz可調電壓由0V到0.8V.此壓控振盪器由台積電0.18製程晶片面積為0.937 1.031 。
在合併雙頻注入鎖定除二除頻器中,此電路包含由兩個N型金氧半電晶體交錯耦合對為中心所組成的壓控振盪器以及一個用來注入訊號的N型金氧半電晶體並聯共振腔電感所組成。量測結果顯示在注入訊號0 dBm時,其鎖定範圍是從3.7 GHz 到 10.5 GHz,而其消耗功率在供應電壓1.15 V之下只有6.785 mW。
This thesis presents three injection locked frequency dividers, the first one is a Divide by 4 ILFD, the second one is a low-phase noise VCO and the final one is a wide locking range divide-by-2 LC injection-locked frequency divider, these circuits are implemented by using 0.18um CMOS process.
In A wide locking range divide-by-4 LC injection-locked frequency divider (ILFD), the circuit was implemented in the TSMC 0.18μm 1P6MCMOS process. The divide-by-4 ILFD uses a class-C capacitive cross-coupled voltage-controlled oscillator (VCO) with one direct injection MOSFET.
In A low-phase noise oscillator. The oscillator uses a capacitive cross-coupled nMOSFET pair in shunt with the LC-resonator. The varactors in series with two inductors are used to set the oscillation frequency, the voltage swing across a pair of back-to-back varactors is small, this leads to less AM-PM conversion and low phase noise.
In a wide locking range divide-by-2 LC injection-locked frequency divider (ILFD) was implemented in the TSMC 0.18 μm 1P6M CMOS process. The divide-by-2 ILFD uses a capacitive cross-coupled voltage-controlled oscillator (VCO) with one direct injection MOSFET. The dc gate bias of cross-coupled FETs is smaller than dc drain bias. At the drain-source bias of 1.15 V, and at the incident power of 0 dBm the locking range of the divide-by-2 ILFD is 5.2 GHz, from the incident frequency 4.1 GHz to 9.3 GHz, the percentage is 77.6%. The core power consumption is 6.785 mW. The die area is 1.058 × 0.862 mm2.
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