近年來，隨著CMOS在積體電路製程技術上不斷提昇與進步，相對地也使得高頻電路除了在製作上更為精密外，也使得在應用上更為廣泛。而這尤以在無線通信系統上更為顯著。
在高頻電路中最為重要的模組即為鎖相迴路(Phase-Locked Loop)。本文首先即是針對目前最新所發表之其中部份─相位頻率偵測器(Phase Frequency Detector)、電荷幫浦(Charge Pump) 、除頻器(Divider)利用ADS(Advanced Design System)軟體作一電路分析及模擬。其次，利用Fujitsu MB15F76UL、VC-26、Maruwa MVY-4875 商用元件製作一操作頻率2.5G之PLL，最後再用頻譜分析(spectrum analyzer) 作一實際量測。

In recent years, promote and progress continuously on the integrated circuit manufacturing process technique along with the CMOS, relatively also in addition to more precisely in manufacturing, make high electric circuit of made more extensive in applying.And this is particularly more obvious in lead-in corresponding by letter the system.The most important in high electric circuit of the module of more difficult design for a frequency to match to become useful
This text is to aim at first at the present time lately announce the frequency to synthesize the machine in it among them partial- mutually a frequency detects the machine.
Finially, I make a Dual modual PLL by the chips of MB15F76UL,VC-26,MVY-4875 and so on.

[1]袁杰,“高頻通信電路設計-震盪電路相鎖環路及頻率合成”
全華科技圖書股份有限公司
[2] B. Razavi, RF Microelectronics, Prentice Hall, 1997.
[3] http://edevice.fujitsu.com/jp/datasheet/j-ds/
[4] http://edevice.fujitsu.com/fmd/products/vco
[5]http://www.maruwacera.co.jp/seihin/2004catalog/Radiofrequency
[6] Ulrich L. Rohde," RF/Microwave Circuit Design forWireless Application," John Wiley & Sons,Inc. ,2000.
[7]E. Juarez-Hernandez, A. Diaz-Sanchez, “A novel CMOS charge-pump circuit with positive feedback for PLL applications,’’ 2001. ICECS 2001. The 8th IEEE International Conference on Electronics, Circuits and Systems, vol. 1 , pp. 349 –352,2001.
[8]E.J. Hernandez, A. Diaz Sanchez,　“Positive feedback CMOS charge-pump circuits for PLL applications,’’ 2001. MWSCAS 2001.Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems, vol. 2 ,pp. 836 –839,2001.
[9]　Kwangho Yoon, Wonchan Kim,　“Charge Pump Boosting Technique For Power Noise Immune High Speed PLL Implementation,’’ Proceedings of the 6th International Conference on Optimization of Electrical and Electronic Equipments, 1998. OPTIM '98., Vol. 3 , pp. 639 –642, May 1998.
[10]　J. McNeill, R. Croughwell, L. DeVito, A. Gasinov, “ A 150 mW, 155 MHz phase locked loop with low jitter VCO,” 1994. ISCAS '94. 1994 IEEE International Symposium on Circuits and Systems, vol. 3 , pp. 49 –52, May-2
[11]　R.C. Chang,Lung-Chih Kuo, “A differential type CMOS phase frequency detector,’’ Proceedings of the Second IEEE Asia Pacific Conference onASICs, vol.5, 2000. AP-ASIC 2000, 2000.pp. 61 –64.