一般而言，薄膜電晶體使用黃光微影製程來進行圖案化以防止柵極漏電流，但是該方法不適合用於溶液製程的薄膜電晶體。我們開發了一種簡單快速的方法，透過旋轉塗佈自組裝單分子來製造具有低柵極漏電流的薄膜電晶體。通過在半導體和介電層之間的介面處引入特定的偶極矩來操控局部的內置電場，以降低電子被捕獲到介電層界面缺陷的可能性。我們證明矽烷分子的偶極矩在半導體和介電層的異質界面之間的垂直傳輸中有著重要作用。透過X光射線電子能譜儀光譜和薄膜電晶體中柵極漏電流的程度來評估介面處偶極層內的偶極子的排列取向。

Typically, TFTs are patterned by photolithography to prevent gate leakage current but this method is not suitable for the solution processed top-gate staggered TFTs. We developed a simple and rapid approach to fabricate TFTs with low gate leakage current by spin-coating of the gate insulator with molecular self-assembled films. The local built-in electric field is manipulated by introducing a specific dipole moment at the interface between the semiconductor and the dielectric layer to reduce the probability of electron trapping to the trap sites at the interface of the dielectric layer. We demonstrate that the dipole moment of silane-based self-assembled molecules plays an important role in vertical transport of electrons between heterointerface of semiconductor and dielectric layer. The arrangement of dipolar molecules at the interface affects the net dipole moment, which is evaluated by XPS results and extent of gate leakage current in TFTs.

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