寬讀取功率雙頻段15位元CMOS被動式感測UHF RFID標籤設計｜國立臺灣科技大學博碩士論文系統

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研究生：	周晉豪 Jin-Hao Chou
論文名稱：	寬讀取功率雙頻段15位元CMOS被動式感測UHF RFID標籤設計 A wide input power range dual-band 15-bit CMOS passive sensing UHF RFID Tag Design
指導教授：	姚嘉瑜 Chia-Yu Yao
口試委員:	姚嘉瑜 Chia-Yu Yao 陳筱青 Hsiao-Chin Chen 彭盛裕 Sheng-Yu Peng
學位類別：	碩士 Master
系所名稱：	電資學院 - 電機工程系 Department of Electrical Engineering
論文出版年：	2023
畢業學年度：	112
語文別：	英文
論文頁數：	73
中文關鍵詞：	雙頻段被動式 UHF RFID Tag 、寬讀取功率範圍、三角積分調變器、穩壓器
外文關鍵詞：	Dual-band passive UHF RFID Tag, wide read power range, delta-sigma modulator, voltage regulator, Energy Harvesting
相關次數：	點閱：79 下載：4
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本論文為寬讀取功率雙頻段 15 位元 CMOS 被動式感測 UHF RFID Tag，應用
方面為室內感測系統。雙頻段為 Power-link 866/925MHz 以及 Data-link 433MHz。本論文所設計之 Tag 屬於被動式，電源由 Energy Harvesting 產生，Power-link 頻段會負責傳送連續弦波訊號，由 Charge Pump 對電容充電轉換成電源，此外 Powerlink 頻段也負責反散射回傳的 Data；Data-link 頻段除了接收 Reader 端的編碼與調變後的 preamble 指令與 ID，還需傳送連續方波訊號，當作Tag 所需之時脈。感測功能使用離散時間的一階三角積分調變器，透過觀察輸入直流電壓的變化進行調變，輸出一個周期性訊號並由 FM0 傳送。

在實際應用上，Reader 與 Tag 之間的距離可近可遠，因此本論文所追求的 Tag 在有足夠寬的讀取範圍下還能有足夠低的讀取功率。感測功能則搭配被動式感測器的輸出直流電壓以方便使用者監測室內環境參數，此感測值依據使用者要求可以是溫度、濕度或其他數據。其他特色如: 使用低功耗參考電壓電路搭配 Regulator 電路達到低功耗且輸出電壓穩定。至於取代震盪器是利用 Datalink 傳送 Tag 所需時脈訊號供後方數位電路與 DSM 電路使用。實際量測 Powerlink 於 925MHz 時，最低讀取功率為 -21 dBm，而 datalink 最低讀取功率為 -23 dBm。本論文使用台灣積體電路(TSMC)0.18um mixed signal/RF 1P6M CMOS 製成實現，由 Full-Custom 設計流程來完成。

This thesis presents a wide input power range dual-band 15-bit CMOS passive sensing UHF RFID Tag for indoor sensing systems. The tag operates Powerlink at 866/925 MHz and Datalink at 433 MHz. Since the tag is passive, supply power is provided by energy harvesting. The Powerlink is responsible for transmitting continuous sinusoidal signals and providing power by charging the capacitor through a charge pump. Additionally, it is also responsible for transmitting backscattered data. The Datalink transmits the encoded and modulated preamble commands and ID from the reader and transmits continuous square wave signals as the clock for the tag. The sensing function uses a discrete-time first-order sigma-delta modulator. It modulates the input DC voltage by observing its variations and outputs a periodic signal encoded in the FM0 form.

The distance between the reader and the tag can vary widely in practical applications. Therefore, the tag in this work should have a sufficiently wide reading range and low power consumption. The sensing function facilitates the user to monitor changes in the indoor environment. The sensing value can be temperature, humidity, or other data according to the user's requirements. Other design features include the low-power reference voltage circuit combined with a regulator circuit, which achieves low power consumption and stable output voltage. The oscillator is replaced with the Datalink transmitted clock signal. In actual measurements, the minimum reading power for Powerlink at 925 MHz is -21 dBm, and for Datalink is -23 dBm. The tag was fabricated using a TSMC 0.18um mixed-signal/RF 1P6M CMOS process, designed using a fullcustom design flow.

摘要	I
Abstract	II
致謝	III
Table of Contents	IV
List of Figure	VII
List of Table	XI
Chapter 1 Introduction	1
1 Introduction and Background	1
2 Research Motivation and Objectives	2
3 Using Tools and Simulation Software	2
4 Thesis Structure	2
Chapter 2 RFID Related Regulations	4
1 Frequency bands for RFID system	4
2 Encoding and modulation in RFID system	5
2.1 ASK & OOK	5
2.2 FSK & PSK	6
2.1 PIE(Pulse-Interval Encoding) symbol	8
2.2 FM0 Encoding	10
Chapter 3 Proposed RFID System Block	12
Chapter 4 RFID Tag Circuit Design	14
1 Powerlink	14
1.1 Charge Pump	14
1.2 Limiter & Power-on-reset	18
1.3 Voltage Reference	19
1.4 Regulator	23
2 Datalink	25
2.1 Envelope Detector	25
2.2 PIE-to-Binary Decoder	26
2.3 Baseband Processing Unit	28
2.4 Level Shifter	31
2.5 FM0 Encoder	32
2.6 Backscatter	33
3 Sensing Circuit	34
3.1 First-order Delta-Sigma Modulator	34
3.2 Proposed Architecture	36
3.3 Simulation Result	45
Chapter 5 Experiment Result	47
1 Simulation Result I: Powerlink	47
1.1 The Lowest Input Power in Different Corners	48
1.2 The Medium Input Power in Different Corners	49
1.3 The High Input Power in Different Corners	51
2 Simulation Result II: Datalink	52
2.1 Command1 at Lowest Input Power	53
2.2 Command1 at Medium Input Power	55
2.3 Command1 at Highest Input Power	56
2.4 Command2 at Lowest Input Power	57
2.5 Command2 at Medium Input Power	59
2.6 Command2 at Highest Input Power	60
3 Chip Implement	61
3.1 Design Flow	61
3.2 Tape Out	62
4 Measurement Result	63
4.1 PCB board fabrication	64
4.2 Measurement environment	64
4.3 Impedance matching result & Output signal waveform	65
4.4 Measurement Discrepancies	67
4.5 Comparison with other literature	69
Chapter 6 Conclusion & Future Work	71
1 Conclusion	71
2 Future Work	71
References	72
                                

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