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研究生： 戴鴻恩
Hung-En Tai
論文名稱： 以虛擬流程在半導體晶片製造上實施新的品質管理策略
A new quality strategy for in-line quality control and defect inspection by the virtual process in semiconductor wafer fabrication
指導教授： 潘昭賢
Chao-Hsien Pan
口試委員: 林丙輝
none
鐘崑仁
none
學位類別： 博士
Doctor
系所名稱： 管理學院 - 管理研究所
Graduate Institute of Management
論文出版年： 2008
畢業學年度： 97
語文別： 英文
論文頁數： 68
中文關鍵詞： 品質管理 、半導體生產 、虛擬量測 、統計製程管制 、虛擬檢測 、機台即時缺陷偵測分類系統 、生產線上缺陷檢查
外文關鍵詞： Quality control, semiconductor manufacturing, Virtual metrology, SPC, Virtual Inspection, Fault Detection and Classification, In-line defect inspection
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  •  上一筆

    • 在半導體製造的生產流程上，即時的品質量測和檢測在管制及改善良率上扮演著日趨重要的角色，特別是在先進的12吋晶圓廠上。因此在製程上，晶片層級的量測方法和缺陷檢測是急待突破的兩塊領域。本文針對量測問題提出一個虛擬量測的擴大概念，那即是利用製程機台的狀態變量特徵值(SVID)去預測晶片層級的製程品質。本文中，對於半導體生產線上的膜厚及尺寸的品質管制模型，我們將討論多重線性迴歸(MLR)和部分最小平方法(PLS)兩種預測技術，並且依據預測模型的殘差之趨勢特徵，提出利用統計製程管制(SPC)手法來強化虛擬量測的應用。此外，在這研究中不但展示了一個在半導體製造生產上實行虛擬量測的管制警示架構，並且也以實際的案例資料說明了實行的成效
    在半導體生產線上的缺陷檢測，本文提出了虛擬檢測的概念，其概念的理論基礎是基於製程設備的狀態變量特徵值(SVID)能有效而忠誠反映出製程品質。虛擬檢測使缺陷監控進入了一個新的時代，那即是缺陷檢測的層級從批次的抽樣檢測提升至晶片層級的檢測，並且因此而提升抽樣的檢測策略從隨機抽樣到全線的普測。在這項研究過程中，我們利用多種典型的缺陷案例說明如何建立虛擬檢測的模型並且證實這些預測模型的可靠性。而且我們也為半導體工廠在大量生產上提出一個實際可行的實行架構。

    The in-line quality control (QC) measured data plays an increasingly important role in both the control and the improvement of yields in the production process of semiconductor manufacturing, especially in 300mm semiconductor factories. Thus a breakthrough in the measuring methodology associated with wafer level production is highly desirable. This research addresses this issue and proposes an extended concept of virtual metrology (VM) that utilizes the status variables identification (SVID) of process equipments to predict process quality of wafer level. In this research, we will discuss two modeling techniques, namely multiple linear regression (MLR) and partial least square (PLS) regression, to build prediction models for the film thickness and critical dimensions (CD) for the on-line production of semiconductor manufacturing. This research proposes to use statistical process control (SPC) rules to enhance the credibility of the VM applications based on the tendency and characteristics of the residuals of the VM models. Finally, this study presents an architecture for the control and alarm mechanism of the VM approach in semiconductor manufacturing and illustrates the results on the application of this architecture with two real cases as well.
    The defect of process equipments is a major factor that impairs the yields in the mass production of semiconductor wafer fabrication and it is a main supervision means to use high-resolution defect inspection tools to detect and monitor the defect damage. Due to the high investment costs of these inspection tools and the resulting decrease in the throughput, how to improve the sampling rate is an important issue for the associated inspection strategy. This research proposes a new concept and method of virtual inspection (VI) to enhance the detection and monitoring of defect effectively in semiconductor production process. The underlying theory of the VI concept is that the state variables identifications (SVIDs) of process equipments can reflect the process quality effectively and loyally. The approach of VI is to combine the application of the fault detection and classification (FDC), and the defect library and the re-engineering of inspection procedure to reach the full-scope of strategic objective. VI enables the defect monitoring to enter a new era by promoting the monitoring level of defect inspection from the previous lot-sampling basis to the wafer-sampling level, and hence upgrades the sampling strategy from random sampling to full and right sampling. In this study, we utilize various typical defect cases to illustrate how to create VI models and verify the reliability of the proposed approach. Furthermore, we present a feasible architecture of the VI implementation for mass production in semiconductor factory.

    中文摘要I ABSTRACTII 誌謝IV CONTENTSV LIST OF FIGURESVIII CHAPTER 1 INTRODUCTION1 1.1 Research motivations1 1.2 Research objectives and framework2 1.3 Research restrictions4 CHAPTER 2 LITERATURE REVIEW5 2.1 Review of Virtual metrology application5 2.2 Review of defect inspection application11 CHAPTER 3 IMPLEMENTING VIRTUAL METROLOGY FOR IN-LINE QUALITY CONTROL IN SEMICONDUCTOR MANUFACTURING17 3.1 Description of the VM approach17 3.1.1 Data integrity check17 3.1.2 Variable transformation and data set17 3.2 Description of the proposed VM model building approach19 3.2.1 Description of multiple linear regression19 3.2.2 Description of partial least square (PLS) regression20 3.2.3 Description of the prediction accuracy evaluators21 3.3 A real case on the application of VM approach in CD measuring22 3.3.1 Data background22 3.3.2 An MLR approach to the CD prediction22 3.3.3 A PLS regression approach to the CD prediction25 3.3.4 Verification of the results27 3.4 A real case on the application of VM approach in film thickness measuring28 3.4.1 Data background28 3.4.2 An MLR approach to film thickness prediction28 3.4.3 A PLS regression approach to film thickness prediction30 3.4.4 Verification of results31 3.5 A SPC approach to VM33 3.6 An architecture of VM implementation38 CHAPTER 4 A NEW STRATEGY FOR DEFECT INSPECTION BY THE VIRTUAL INSPECTION IN SEMICONDUCTOR WAFER FABRICATION40 4.1 Description of the proposed VI process40 4.1.1 Description of the the defect library40 4.1.2 Description of the SVIDs collection41 4.1.3 Description of the SVIDs characteristic treatment41 4.1.4 Description of the multivariate statistical engine41 4.2 Description of the proposed VI model building approach44 4.2.1 PCA approach44 4.2.2 T-Square Statistic45 4.2.3 Q Statistic45 4.2.4 Discriminant Function analysis46 4.3 Verification of VI application by real defect cases of different types48 4.3.1 BPTEOS void issue48 4.3.2 Ti/TiN film peeling issue50 4.3.3 A photo defocus issue cause by wafer’s backside particles51 4.3.4 A Particle issue on Al/Cu deposition process53 4.4 An architecture of VI implementation55 CHAPTER 5 CONCLUSIONS AND SUGGESTION56 5.1 Conclusions56 5.2 Suggestions for future research58 REFERENCES59

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