研究生: |
劉宇晨 YU-CHEN LIU |
---|---|
論文名稱: |
交錯式降壓型功率因數修正器之自適應斜率補償 Adaptive Slope Compensation for Interleaved Buck Power Factor Correctors |
指導教授: |
邱煌仁
Huang-Jen Chiu 謝耀慶 Yao-Ching Hsieh |
口試委員: |
陳德玉
Dan Chen 陳耀銘 Yaow-Ming Chen 陳建富 Jiann-Fuh Chen 梁從主 Tsorng-Juu Liang 楊宗銘 Chung-Ming Young 劉益華 Yi-Hua Liu |
學位類別: |
博士 Doctor |
系所名稱: |
電資學院 - 電子工程系 Department of Electronic and Computer Engineering |
論文出版年: | 2015 |
畢業學年度: | 103 |
語文別: | 中文 |
論文頁數: | 134 |
中文關鍵詞: | 箝位電流模式控制 、交錯式降壓型轉換器 、功率因數修正器 、相位管理 |
外文關鍵詞: | clamp-current mode control, interleaved buck converter, power factor corrector, phase management |
相關次數: | 點閱:908 下載:14 |
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本論文提出箝位電流控制模式實現交錯式降壓型功率因數修正器,提出隨不同的輸入電壓修改斜率補償的參數,達到在寬範圍的電壓輸入下都能維持較高的功因值及較低的總諧波失真值。此外,透過損耗分析的計算,來決定單、雙相的切換點,改善輕載時的切換損。使用UC3842作為控制器實現具有箝位電流特性的功率因數修正器,雛型電路的輸入規格為寬範圍的電壓輸入、輸出規格為80V、輸出瓦數為300W。在輸入電壓115V及230V的條件下,電路的轉換效率從輕載(滿載的10%)至滿載均高於95.8%,功因值從半載至滿載均大於0.96,輸入的總諧波失真符合IEC 61000-3-2 Class D的規範。
This dissertation proposed an adaptive slope compensation method into the clamping current control at various input voltages to improve the PF and THD of the universal input. The controller conducts a phase-management mechanism for various input voltages and load conditions to reduce the switching loss of light load. The optimal switching timing for one-phase and two-phase operations can be determined from the power-loss distribution. The UC3842 is used as the control IC with a clamp-current feature for the PFC. A 300-W laboratory prototype with a universal line voltage, 80-V DC output voltage is designed and tested to verify the feasibility. The values of efficiency from light load (10% of rated power) to full load at 115 V and 230 V inputs are greater than 95.8%. PF values from mid- to full load are greater than 0.96. Input current harmonics also meet the norm of IEC 61000-3-2 Class D.
[1] A. I. Pressman, Switching Power Supply Design. McGraw-Hill, 2009.
[2] 梁適安,交換式電源供給器之理論與實務設計,全華科技圖書股份有限公司,2008年。
[3] 吳義利,切換式電源轉換器:原理與實用設計技術,文笙書局股份有限公司,2012年。
[4] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics. Kluwer academic Publishers, 2001.
[5] Environmental Protection Agency (EPA). (2008). Energy Star Program Requirements for Single Voltage External AC–DC and AC–AC Power Supplies [Online]. Available: http://www.energystar.gov/ia/partners/product_specs/program_reqs/EPS_Eligibility_Criteria.pdf
[6] European Commission. (2004). Code of Conduct on Energy Efficiency of External Power Supplies [Online]. Available: http://sunbird.jrc.it/energyefficiency/pdf/Workshop_Nov.2004/PS%20meeting/Code%20of%20Conduct%20for%20PS%20Version%202%2024%20November%202004.pdf
[7] 80 Plus Specification. [Online]. Available: http://www.80plus.org/80what.htm
[8] J. Yang, J. Zhang, W. Xinke, Z. Qian, and M. Xu, “Performance comparis on between buck and boost CRM PFC converter,” in Proc. Control and Modeling for Power Electronics (COMPEL), 2010, pp. 1-5.
[9] 謝孟軒,交錯式降壓型功率因數修正器電磁干擾研究,國立台灣科技大學電子工程系碩士論文,2013年。
[10] H. Endo, T. Yamashita, and T. Sugiura, “A high-power-factor buck converter,” in Proc. Power Electronics Specialists Conferenc, 1992, pp. 1071–1076.
[11] H. Choi, “Interleaved boundary conduction mode (BCM) buck power factor correction (PFC) converter,” IEEE Transactions on Power Electronics, vol. 28, no. 6, pp. 2629-2634, June 2013.
[12] X. Wu, J. Yang, J. Zhang, and M. Xu, “Design considerations of soft-switched buck PFC bonverter with constant on-time (COT) control,” IEEE Transactions on Power Electronics, vol. 26, no. 11, pp. 3144-3152, Nov. 2011.
[13] X. Wu, J. Yang, J. Zhang, and Z. Qian, “Variable on-time (VOT)-controlled critical conduction mode buck PFC converter for high-input AC/DC HB-LED lighting applications,” IEEE Transactions on Power Electronics, vol. 27, no. 11, pp. 4530-4539, Nov. 2012.
[14] L. Huber and M. M. Jovanovic, “Design-oriented analysis and performance evaluation of clamped-current-boost input-current shaper for universal-input-voltage range,” IEEE Transactions on Power Electronics, vol. 13, no. 3, pp. 528-537, May 1998.
[15] L. Huber, G. Liu, and M. M. Jovanovic, “Design-oriented analysis and performance evaluation of buck PFC front end,” IEEE Transactions on Power Electronics, vol. 25, no. 1, pp. 85-94, Jan. 2010.
[16] C. C. Huang, Y. C. Liu, T. F. Pan, P. J. Tseng, C. H. Chang, Y. K. Lo and H. J. Chiu, “Study on an interleaved buck power factor corrector with GaNFET and integrated inductor,” in Proc. Future Energy Electronics Conference (IFEEC), 2013, pp. 30-35.
[17] 陳育文,交錯式降壓型功率因數修正器之研製,國立台灣科技大學電子工程系碩士論文,2013年。
[18] 陳讚,基於DSP控制之交錯式降壓型功率因數修正器,國立台灣科技大學電子工程系碩士論文,2013年。
[19] C. Y. Yang , Y. C.Liu, P. J. Tseng, T. F. Pan, H. J. Chiu, and Y. K. Lo, “DSP-based interleaved buck power factor corrector with adaptive slope compensation, ” IEEE Transactions on Industrial Electronics, to be published.
[20] J. C. Tsai, C. Y. Chen, Y. T. Chen, C. L. Ni, Y. P. Su, K. H. Chen, Y. W. Chen, C. C. Liang, C. A. Ho, and T. H. Yu, “Automatic loading detection (ALD) technique for 92% high efficiency interleaving power factor correction (PFC) over a wide output power of 180W,” in Proc. Solid State Circuits Conference, 2012, pp. 229-232.
[21] Y. C. Liu, T. F. Pan, P. J. Tseng, C. C. Huang, Y. K. Lo, and H. J. Chiu, “Study and implementation of a two-phase interleaved bridgeless buck power factor corrector,” in Proc. Future Energy Electronics Conference (IFEEC), 2013, pp. 42-47.
[22] L. Huber, J. Yungtaek, and M. M. Jovanovic, “Performance evaluation of bridgeless PFC boost rectifiers,” IEEE Transactions on Power Electronics, vol. 23, no. 3, pp. 1381-1390, May 2008.
[23] Texas Instruments Inc, “Power Factor Correction Using the Buck Topology-Efficiency Benefits and Practical Design Considerations” Application Note SLUP264, June. 2010.
[24] STMicroelectronics Inc, “UC3842 Current Mode PWM Controller” Data Sheet, June. 1999.