研究生: |
潘昜甫 Yang-Fu Pan |
---|---|
論文名稱: |
聲頻應用之等效12位元混和強健式MASH-21三角積分調變器 A 12-bit Hybrid Sturdy MASH-21 Delta-Sigma Modulator for Audio Applications |
指導教授: |
姚嘉瑜
Chia-Yu Yao |
口試委員: |
陳筱青
Hsiao-Chin Chen 彭盛裕 Sheng-Yu Peng |
學位類別: |
碩士 Master |
系所名稱: |
電資學院 - 電機工程系 Department of Electrical Engineering |
論文出版年: | 2021 |
畢業學年度: | 109 |
語文別: | 中文 |
論文頁數: | 65 |
中文關鍵詞: | 三角積分調變器 、強健式MASH 、全差動運算轉導放大器 、切換式電容積分器 、雜訊移頻 |
外文關鍵詞: | Delta-Sigma Modulator, Sturdy MASH, Fully Differential OTA, Switched-Capacitor Integrator, Noise Shaping |
相關次數: | 點閱:256 下載:0 |
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本篇論文設計一應用於聲頻之離散時間混和強健式MASH-21三角積分調變器。系統藉由消除第一級量化雜訊以提升相較於SMASH-21架構約3 dB的訊雜比,並且有三至四階的雜訊移頻效果。本系統使用全差動架構的電路實現,以抑制偶次項諧波在電路中的影響,進一步提升系統的線性度以及解析度。由於本系統為離散時間系統,因此使用反相與非反相切換式電容積分器來實現離散時間積分器。
本篇論文所設計之晶片使用TSMC 0.18-μm CMOS 製程,操作電壓為1 V, 晶片總功率消耗807.5 μW,總面積為3.096 mm2。系統頻寬22.05 kHz,取樣頻率4.2336 MHz,超取樣率為96倍。晶片解析度(SNDR)可達76.22 dB,等效位元12.37位元。
This paper presents a discrete-time hybrid sturdy MASH-21 (HSMASH-21) delta-sigma modulator for audio applications. The system is able to cancel first stage quantization noise mathematically, which provides a 3-dB signal-to-noise ratio (SNR) improvement over a SMASH-21 system. This work employs fully differential operational transconductance amplifier (OTA) to reduce the impact of even-mode harmonics. Inverting and non-inverting switched-capacitor integrators are used for realizing discrete-time integrators.
The proposed circuit is designed and realized in TSMC 0.18-μm CMOS technology. The supply voltage is 1 V and the chip consumes 807.5 μW of power. The sampling rate is 4.2336 MHz and the oversampling ratio is 96. The achieved signal-to-noise-and-distortion-ratio (SNDR) of the chip is 76.22 dB. The chip occupies an area of 3.096 mm2.
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