超取樣和三角積分調變技術早已被廣泛地應用在現代超大型積體電路中的類比和數位轉換介面，例如數位音響系統和寬頻網路上的應用。在數位音響應用中，類比數位轉換器(ADC)在20 仟赫的頻帶範圍內必需達到16 到20 個位元的精確度。利用三角積分調變技術不但可以達到這樣的精確度而且對於其內部組成電路的要求不像其他類比數位轉器這樣嚴苛。它在高精度類比數位轉換器的實現上提供了許多卓越的優點。正因為三角積分調變技術對類比電路的表現要求不高，所以就功率的消耗上也可大幅的減少，另外相較於其他種類的類比數位轉換器，其電晶體的數量和電路的複雜度也簡單得多。同時三角積分調變器也容許將主要的電路性能和功率消耗集中在其輸入級的類比電路中。
對於一個多位元三角積分調變器來說，整個系統性能的好壞往往取決於其系統迴授路徑中數位類比轉換器(DAC)的線性度。如今已有許多種動態元素匹配演筭法(Dynamic Element-Matching Algorithm)被提出，用來改善三角積分調變器中數位到類比轉換的不理想性，藉由這些演算法可以將不理想數位類比轉換過程所產生的誤差和雜訊，用類似消除量化誤差的方法將其壓制，有效地改善實際多位元三角積分調變器之性能。
整篇論文簡單地描述了三角積分調變器的基本原理，以及一元位三角積分調變器從設計到電路實現。整個類比數位轉器透過0.35微米互補式金氧半的製程實現，可有效地應用在頻寬為20 仟赫的數位音響系統中。

Oversampling techniques based on delta-sigma modulation are widely used to implement the interface between analog and digital signals in VLSI systems, such as digital audio systems. This type of systems requires a large dynamic range (i.e., about 16 ~ 20 bits) at low-frequency bandwidth of 20 kHz. The delta-sigma modulation approach is relatively insensitive to imperfections in circuit components and offers numerous advantages for the realization of high-resolution analog-to-digital (A/D) converters. In particular, oversampling architectures is a potentially power-efficient means of implementing high-resolution A/D converters because they reduce the number and complexity of the analog circuits in comparison Nyquist-rate converters. Furthermore, they allow the performance requirements, and thus most of the power dissipation, to be concentrated in the input stage of a converter.

For a multibit ΔΣ modulator, the performance is directly related to the linearity of the internal multibit DAC in the feedback path. Various dynamic element-matching techniques have been proposed to circumvent the nonlinearity of the internal DAC. By using these techniques, the DAC noise is also shaped like quantization noise in delta-sigma modulators.

This thesis describes the results of research into the design of the oversampling one-level delta-sigma modulators implemented by switch-capacitor circuits, digital audio applications. The experimental modulators described herein can deliver a high dynamic range over a 20 kHz bandwidth and have been fabricated in standard 0.35 μm CMOS technologies.

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