本論文針對SISO及2x2MIMO之OFDM系統提出以Maximum Likelihood(ML)為主要架構的載波頻率偏移(Carrier Frequency Offset,CFO)估測系統，透過同調(coherent)檢測的概念，設計所需的解析度(Resolution)以決定ML所需的相關器個數，解析度越高使估測出的CFO範圍就會越細。將解析度對應成數個參考頻率點的複數弦波，放至相關器中各別計算與OFDM接收封包之長訓練符元(Long Training Symbol,LTS)的相關性，找出在哪一參考頻率點可以得到最大相關性，便以其當作CFO的估測值。在2x2MIMO時，OFDM系統參照IEEE 802.11n標準，加入循環位移分集(Cyclic Shift Diversity,CSD)技術，估測時必須分開計算其訊號來自天線A及天線B的情況並將相關性合併比較，提高抗雜訊能力。從硬體角度，當ML的解析度越高，雖然可讓估測精準度提高，但硬體資源需求也相對越大。在2x2MIMO的模擬情況中，ML的抗雜訊能力在位元錯誤率表現優於預設之CFO估測系統。本論文以此演算法為目標，透過Verilog硬體描述語言設計，利用Xilinx ISE進行合成，最後將電路實現於FPGA開發板上。

This thesis proposes the hardware design and implementation of a Maximum Likelihood (ML) Carrier Frequency Offset (CFO) estimation algorithm for SISO and 2x2 MIMO OFDM systems. The resolution of the CFO estimation algorithm determines the number of ML correlators and reference complex waveforms for different frequencies. Hence higher resolution enhances estimation accuracy but requires more hardware resources. The algorithm calculates the correlations between the Long Training Symbol (LTS) in every packet and the reference complex waveforms. Finally, the frequency value which produces the maximum correlation is the estimated CFO value. For the 2x2 MIMO system, Cyclic Shift Diversity (CSD) is added to the OFDM system following the IEEE 802.11n standard. It increases the anti-noise capability since the correlations are calculated separately for both antennas A and B and combined for comparison. Moreover, simulation results for the 2x2 MIMO system show that ML algorithm has better BER performance than the default system of CFO estimation. Using Verilog HDL for design and Xilinx ISE for circuit synthesis, we implement this algorithm on an FPGA development board.

[1] IEEE 802.11, “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications,” IEEE 802.11, 1999.
[2] IEEE 802.11a, “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High-speed Physical Layer in the 5 GHz Band,” IEEE 802.11a, 1999.
[3] IEEE 802.11g, “Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High-speed Physical Layer in the 2.4 GHz Band,” IEEE 802.11g, 2003.
[4] G. L. Stuber, J. R. Barry, S.W. Mclaughlin, Y. Li, M. A. Ingram, and T. G. Pratt, “Broadband MIMO-OFDM Wireless Communications,” Processing of the IEEE, vol. 92, no. 2, Feb. 2004, pp.271-294.
[5] S. B. Weinstein and P. M. Ebert, “Data transmission by frequency division multiplexing using Fourier transform,” IEEE Trans. Commun. Technol., vol. COM-19, pp. 628-634, Oct. 1971.
[6] A. Peled and A. Ruiz, “Frequency domain data transmission using reduced computational complexity algorithms,” in Proc. IEEE Int. Conf. Acoust., Speech, Signal Processing, 1980, pp. 964-967.
[7] T. M. Schmidl, and D. C. Cox, “Robust Frequency and Timing Synchronization for OFDM,” IEEE Trans. Commun., vol. 45, no. 12, Dec. 1997.
[8] J. Li, G. Liu, and G. B. Giannakis, “Carrier Frequency Offset Estimation for OFDM-Based WLANs,” IEEE Signal Process. Lett., vol. 8, no. 3, March 2001.
[9] M. Li, J. Zhao, and L. K. Chen, “Blind Maximum-likelihood Frequency Offset Estimation for Coherent Fast OFDM Receivers,” 18th OptoElectronics and Communications Conference held jointly with 2013 International Conference on Photonics in Switching, 2013.
[10] J. Mar, C. C. Kuo, and S. H. Chou, “FPGA Implementation of SDR Based CFO Estimation and Compensation Circuit for OFDM System,” J Sign Process Syst, 2013.
[11] J. Cho, Y. Cho, M. R. Islam, J. Kim, and W. K. Cho, “Hardware-Efficient Auto-Correlation for Synchronization of MIMO-OFDM WLAN Systems,” SoC Design Conference (ISOCC), 2009.
[12] W. H. Tseng, C. C. Chang, and C. K. Wang, “Digital VLSI OFDM Transceiver Architecture for Wireless SoC Design,” Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium, 2005.
[13] C. Yu, C. H. Sung, C. H. Kuo, and M. H. Yen, and S. J. Chen, “Design and Implementation of a Low-Power OFDM Receiver for Wireless Communications,” Consumer Electronics, IEEE Transactions, 2012.
[14] A. Troya, K. Maharatna, M. Krstiˇc, E. Grass, U. Jagdhold, and R. Kraemer, “Low-Power VLSI Implementation of the Inner Receiver for OFDM-Based WLAN Systems,” IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 55, NO. 2, MARCH 2008
[15] Xilinx LogiCORE IP DDS Compiler v4.0 Product Specification, DS558, March 2013
[16] W. Y. Zou, and Y. Wu, “COFDM: An overview,” IEEE Trans.
Broadcasting, vol. 41, no. 1, pp. 1–8, Mar. 1995.
[17] S. M. Jackman, M. Swartz, M. Burton, T. W. Head, “Certified Wireless Design Professional Official Study Guide”, CWN Exam PW0-250, pp. 340-343, Feb. 2011
[18] P. W. Wolniansky, G. J. Foschini, G. D. Golden, and R. A. Valenzuela,
“V-BLAST: An architecture for realizing very high data rates over rich scattering wireless channels,” in Proc. ISSSE-98, Sep. 1998, pp. 295-300
[19] M. R. McKay and I. B. Collings, “Capacity and performance of MIMO-BICM with zero forcing receivers,” IEEE Trans. Commun., vol. 53, no. 1, pp. 74-83, Jan. 2005.
[20] M. Honqlei, M. J. Juntti, “Space-time channel estimation and performance analysis for wireless MIMO-OFDM systems with spatial correlation,” IEEE Trans. Veh. Technol., vol. 54, pp. 2003-2016, Nov. 2005.
[21] IEEE Std 802.11a-1999, “Supplement to IEEE Standard for Information
Technology - Telecommunications and Information Exchange Between Systems - Local and Metropolitan Area Networks - Specific Requirements - Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications: High-Speed Physical Layer in the 5 GHz Band,”
1999.
[22] WARP Forums:http://warpproject.org/trac/wiki/HardwareUsersGuides/WARPv3
[23] 劉紹漢, 全華, SOC系統晶片設計-使用Xilinx EDK, 2014.
[24] 徐文波, 田耘, Xilinx FPGA開發實用教學, 佳魁資訊, 2013.
[25] IEEE P802.11 Wireless LANs, “TGn Channel Models,” IEEE 802.11-03/940r4, May 2004.
[26] P. Koopman, “32-bit cyclic redundancy codes for Internet applications,” in Proc. IEEE Int. Conf. on Dependable Systems and Networks, Washington, D.C., USA, Jun. 2002, pp. 459–468.