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研究生: 楊家丞
Chia-Cheng Yang
論文名稱: 支援LLVM RISC-V擴充指令集之圖形化介面工具
A Graphical Programming Tool for RISC-V Extension Instruction Sets in LLVM
指導教授: 黃元欣
Yuan-Shin Hwang
口試委員: 黃元欣
Yuan-Shin Hwang
謝仁偉
Jen-Wei Hsieh
賴祐吉
Yu-Chi Lai
學位類別: 碩士
Master
系所名稱: 電資學院 - 資訊工程系
Department of Computer Science and Information Engineering
論文出版年: 2019
畢業學年度: 108
語文別: 中文
論文頁數: 47
中文關鍵詞: 編譯器
外文關鍵詞: compiler, LLVM, RISC-V, OpenBlocks
相關次數: 點閱:198下載:0
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  • 隨著科技的進步,有愈來愈多的指令集架構被研發出來,然而各個目標指令集都有持續的更新與指令的擴充。例如RISC-V,基於RISC的原則所開發出來的指令集架構。但研發新的指令架構,都需要編譯器後端的移植,目前大部分會利用LLVM來處理。所以對於使用LLVM後端開發的效率是非常值得探討的議題。

    本論文提出利用OpenBlocks為基礎的圖形介面工具,進而將LLVM後端開發架構中TableGen所描述的目標暫存器與目標指令集文件檔 .td(target description),製作成可視覺化的介面;其機制是拉取程式塊,以圖形化的方式來描述目標暫存器與目標指令集。因在各個目標架構中進行描述暫存器與指令集皆是使用TableGen的語法與結構,故經過本論文整理過的圖形化介面後可以快速的開發與移植相似的架構。

    最後本論文將現有的RISC-V架構圖形介面工具,擴充單雙精確度浮點數與向量指令集,使此工具擁有產生更完整的指令,且進行各種實測來保證正確性。


    With the advancement of technology, more and more instruction set architectures have been developed. However, each target instruction set has continuous updates and instruction extensions. For example, RISC-V, an instruction set architecture developed based on RISC principles. However, the development of new instruction architectures requires the migration of the compiler backend, and most of them will be processed by LLVM. So the efficiency of using LLVM backend development is a topic worth exploring.

    This paper proposes a graphical interface tool based on OpenBlocks, and then makes the target scratchpad and target instruction set file file .td (target description) described by TableGen in the LLVM backend development architecture into a visualizable interface;The mechanism is to pull the program block to graphically describe the target scratchpad and the target instruction set. Because the description of the scratchpad and the instruction set in each target architecture is the syntax and structure of TableGen, the similar interface can be quickly developed and transplanted after the graphical interface compiled in this paper.

    Finally, this paper extends the existing RISC-V architecture graphical interface tool to expand the floating-point and vector instruction set, Moreover, we do lots of experiments to ensure the accuracy.

    論文摘要 Abstract 致謝 目錄 圖目錄 表目錄 第一章 序論 1.1 研究背景 1.2 研究動機 1.3 研究目的 1.4 研究方法 1.5 論文架構 第二章 文獻回顧 2.1 LLVM 2.2 LLVM Backend 2.2.1 LLVM Backend流程 2.2.2 TableGen 2.3 OpenBlock 2.4 LLVM TDBlock 2.5 RISC-V 第三章 研究方法 3.1概念 3.2 Target Description的Block 3.2.1 Extension F(Float) 3.2.2 Extension D(Double) 3.2.3 Extension V(Vector) 第四章 實驗結果 4.1實驗環境 4.2 數據比對 4.3 執行測試 第五章 結論與未來展望 5.1 結論 5.2 未來展望 參考文獻

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