隨著 RISC-V 架構的技術日益進步，在許多應用方面的 RISC-V 協處理器與加速器都被設計出來，如果要能使 CPU 驅動協處理器就需要含有客製化指令的二進制檔。為了獲得對應的二進制檔，目前最普遍的方式是手動在原始程式(source code)插入相對應的 Inline Aassembly，但這對於大部份的人都非常的困難且複雜。
本論文提出利用 GUI 圖形化介面為基礎的 IDE 工具 AGCC，使用者能利用 AGCC 自動產生客製化 LLVM 後端並產生客製化編譯器最終再生成含有客製指令的二進制檔。而另一個工具 AGRVCC 會自動產生含有協處理器的 bitstream 並將他燒入至 FPGA，最終將 AGCC 產生的二進制檔交給 FPGA 執行並比較含有協處理器與沒有協處理器的執行結果。
使用者只須要將原始程式輸入至 AGCC 並將想要交給協處理器處理的部分選取出來，AGCC 會將產生協處理器 bitstream 的必要檔案傳給 AGRVCC，並且產生客製化編譯器以及生成對應二進制檔，不需要自行修改原始程式也不需要自行改動編譯器相關的檔案等複雜的工作。另外 AGRVCC 也會透過傳入的檔案自行生成含有協處理器的 FPGA 硬體，因此使用者也不需要自行撰寫 verilog 等硬體描述語言即可獲得執行結果。
最後本論文以此圖形化 IDE 工具基於 RISC-V 架構上實作從原始程式(source code)到產生客製二進制檔以及協處理器硬體，並進行各種實測來驗證正確性。

With the popularity of RISC-V, coprocessors for various applications have also been designed. Such as cloud computing, mobile phones, AI computing, etc., In addition, the concept of heterogeneous computing has also been implemented in many products in recent years.
How to design a coprocessor and design instructions and drive it is a hard issue. In addition to writing the verilog of the hardware, it must also be able to generate the corresponding binary file.
Implementing coprocessors manually and generating custom compilers is complex.This article provides a GUI tool that can automatically generate compilers and binaries that support custom instructions, execute and verify correctness on the coprocessor, and then show users the advantages of coprocessor acceleration. Provide more convenient methods in research and development.

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