簡易檢索 / 詳目顯示

研究生: 劉健丞
Jian-cheng Liou
論文名稱: 低功耗且低製程變異之具電壓校正時域智慧型溫度感測器
Low Power and Low Process Variation Time-Domain Smart Temperature Sensor with Voltage Calibration
指導教授: 陳伯奇
Poki Chen
口試委員: 陳信樹
Hsin-shu Chen
李泰成
Tai-cheng Lee
楊清淵
Ching-yuan Yang
鍾勇輝
Yung-hui Chung
學位類別: 碩士
Master
系所名稱: 電資學院 - 電子工程系
Department of Electronic and Computer Engineering
論文出版年: 2014
畢業學年度: 102
語文別: 中文
論文頁數: 128
中文關鍵詞: 時間至數位轉換器電壓校正曲率補償低溫敏電流源智慧型溫度感測器蒙地卡羅分析
外文關鍵詞: Time-to-digital converte, Voltage-calibration, Curvature compensation, temperature-independent current source, Smart temperature sensor, Monte carlo analysis
相關次數: 點閱:312下載:6
分享至:
查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報
  • 低成本且高效能的溫度感測器擁有龐大的市場潛力,被廣泛應用於(1)環境溫度監控、(2)平面顯示器溫度補償、(3)背光系統溫度管理、(4)可攜式或移動式消費電子溫度控制系統、(5)輪胎溫度監測系統…等等並可結合RFID來應用。
    為了克服校正成本及量產成本的問題,本論文所提出之溫度感測器是採用電壓校正實現低功秏且低製程變異之時域智慧型溫度感測器以減少大規模量產成本及功秏。主要架構採一可調節溫敏振盪器,其電壓振盪範圍為具曲率補償之VCTAT與VPTAT參考電壓,用來產生高線性且與溫度相依之輸出脈衝,而時間至數位轉換器(TDC)被用來轉出數位輸出。利用蒙地卡羅分析出最佳面積配比及多重元件佈局技巧以降低製程隨機與系統誤差,並且採用電壓校正取代溫度校正加以去除可調節溫敏振盪器之製程變異的影響。
    本溫度感測晶片使用TSMC 0.18-μm CMOS標準製程來實現,操作速度高達543k S/s且每次轉換功秏僅需364pJ,操作電壓為1.8V,晶片核心面積僅0.134mm2,解析度為0.46°C,且量測誤差可在-0.73°C ~ +1.06°C內,而感溫範圍可從-40°C到120°C。其性能甚至優於以往一些需要單點或雙點校正之溫度感測晶片!因此,本論文架構為時域智慧型溫度感測器立下擺脫定溫校正桎梏之嶄新里程碑。


    Low cost but high performance temperature sensors are extensively applied to the following applications:1) ambient temperature monitoring for home or office electronics; 2) thermal compensation for flat panel displays; 3) temperature management for backlight systems and power electronics; 4) temperature control in portable or mobile consumer electronics products such as personal computers and domestic appliances; 5) tyre monitoring systems and combing integrated temperature sensors with Radio Frequency Identification (RFID) tags.
    To overcome the calibration and mass production problem, this thermal sensor presents the voltage-calibrated and low power CMOS time-domain smart temperature sensor to reduce the cost of mass production and power consumption. An adjustable Temperature-Sensitive Oscillator designed as the temperature sensor vibrates between CMOS-based VCTAT, VPTAT voltage references with mutual curvature compensation to generate linear temperature-dependent output pulses. The TDC is used for output coding. To reduce the process random error and system error are used monte carlo analysis the best layout-aware and multiple component layout skills. Voltage instead of temperature calibration is adopted to alleviate the impact of process variation.
    Fabricated in a TSMC 0.18-μm standard CMOS process, the proposed sensor is able to operate at a high speed of 543k Samples/sec. Moreover, each sample consumes only 364pJ at 1.8V operation voltage. The core active area is merely 0.134mm2, resolution is 0.46°C and inaccuracy is measured to be -0.73°C~+1.06°C in a wide temperature range of -40°C to 120°C. The performance is even superior to some chips with one- or two-point temperature calibrations. A milestone is established for time-domain smart temperature sensor to get rid of the heavy burden of fixed-temperature calibration with reason error budget.

    摘 要 I Abstract II 誌謝 IV 目 錄 V 圖目錄 VIII 表目錄 XI 第一章 序論 1 1.1 研究動機 1 1.2 論文架構 3 第二章 溫度感測器 4 2.1傳統溫度感測元件 4 2.2積體式智慧型溫度感測器 7 2.2.1雙載子電晶體型 8 2.2.1.1與絕對溫度成正比之電路 (PTAT Reference Circuit) 9 2.2.1.2帶差參考電路(Bandgap Reference) 11 2.2.1.3類比至數位轉換器(Analog-to-Digital Converter, ADC) 13 2.2.1.4雙載子電晶體型溫度感測器結論 14 2.2.2四電晶體之溫度感測器 14 2.2.2.1四電晶體型溫度感測器結論 18 2.2.3具偏移時間扣抵之延遲線型 18 2.2.3.1高溫敏延遲線設計 19 2.2.3.2低溫敏延遲線設計 21 2.2.3.3延遲線型溫度感測器結論 22 2.2.4次臨界傳導區漏電流延遲線型 22 2.2.5振盪器型溫度感測器 24 2.2.5.1電流控制振盪器型溫度感測器(1) 24 2.2.5.2電流控制振盪器型溫度感測器(2) 26 2.2.5.3電流控制振盪器型溫度感測器結論 29 2.3 積體式溫度感測器之優勢及相關參數 30 2.4 結論 33 第三章 具電壓校正之時域智慧型溫度感測器 34 3.1整體架構介紹 34 3.2可調節之溫敏振盪器 35 3.2.1提升溫度敏感度與轉換速度方法 36 3.2.2溫敏脈衝寬度與數位值輸出 36 3.2.3電壓校正方式 37 3.2.4本架構之特色 38 3.3 VCTAT與VPTAT電壓參考電路 38 3.3.1提升VCTAT與VPTAT之線性度 38 3.3.2本論文提出之VCTAT與VPTAT電壓參考電路 40 3.3.2啟動電路(Start-Up Circuit) 43 3.4電壓參考電路 44 3.5比較器 45 3.6 14位元低溫敏電流源 52 3.6.1低溫敏電流源電路 53 3.6.2 14位元W-2W二進位電流陣列 55 3.7 14位元循序逼近暫存器電路(SAR) 57 3.8時間至數位轉換器 58 3.8.1非同步計數器(漣波計數器) 60 3.8.2同步計數器 61 3.8.3 10位元混合式時間至數位轉換器 62 3.9電壓校正 63 第四章 佈局考量 66 4.1隨機不匹配誤差 67 4.2系統不匹配誤差 67 4.3多重元件佈局圖 68 4.3.1 VCTAT與VPTAT參考電壓電路 68 4.3.2參考電壓分壓電路 68 4.3.3低溫敏電流源電路 69 4.3.4其他訊號線佈局考量 69 第五章 設計流考量與電路模擬 73 5.1設計流程與考量 74 5.1.1 類比區塊設計(Analog Block Design) 74 5.1.2 數位區塊設計( Digital Block Design ) 74 5.1.3 混合式設計(Mixed-Mode Design) 75 5.2數位區塊與類比區塊劃分之考量 76 5.3類比電路設計與模擬 77 5.3.1 VCTAT與VPTAT電壓參考電路 77 5.3.2參考電壓分壓電路 83 5.3.3比較器 84 5.3.4低溫敏電流源 85 5.3.5溫敏脈衝寬度TSP 85 5.4數位電路設計與模擬 87 5.4.1 10位元混合式時間至數位轉換器 87 5.4.2 14位元循序逼近暫存器電路(SAR) 88 5.5電壓校正時序模擬圖 89 5.6電壓校正後誤差 91 第六章 量測結果 94 6.1晶片微影照與內部區塊配置圖 94 6.2量測考量 94 6.3量測結果 97 6.3.1量測波形 97 6.3.2不同溫度下校正後之誤差與4顆晶片量測結果 100 第七章 效能比較與結論 102 7.1效能比較 102 7.2結論及未來展望 104 7.2.1 結論 104 7.2.2 未來展望 104 參考文獻 106

    [1] 盧明智、盧鵬任 編著,感測器應用與線路分析,台北:全華出版公司,2000。
    [2] R. Achenbach, M. Feuerstack-Raible, F. Hiller, M. Keller, K. Meier, H. Rudolph, R. Saur-Brosch, “A digitally temperature-compensated crystal oscillator,” IEEE Journal of Solid-State Circuits, vol. 35, no. 10, pp. 1502-1506, Oct. 2000.
    [3] C. Poirier, R. McGowen, C. Bostak, S. Naffziger, “Power and temperature control on a 90nm ItaniumR-family processor,” IEEE International Solid-State Circuits Conference, pp. 304-305, Feb. 2005.
    [4] C. Park, H. Chung, Y. S. Lee, J. Kim, J. Lee, M. S. Chae, D. H. Jung, S. H. Choi, S. Y. Seo, T. S. Park, J. H. Shin, J. H. Cho, S. Lee, K. W. Song, K. H. Kim, J. B. Lee, C. Kim, S. I. Cho, “A 512-mb DDR3 SDRAM prototype with CIO minimization and self-calibration techniques,” IEEE Journal of Solid-State Circuits, vol. 41, no. 4, pp. 831-838, Apr. 2006.
    [5] C. Park, H. Chung, Y. S. Lee, J. Kim, J. Lee, M. S. Chae, D. H. Jung, S. H. Choi, S. Y. Seo, T. S. Park, J. H. Shin, J. H. Cho, S. Lee, K. Kim, J. B. Lee, C. Kim, S. I. Cho, “A 512Mbit, 1.6Gbps/pin DDR3 SDRAM prototype with C10 minimization and self-calibration techniques,” IEEE Symposium on VLSI Circuits, pp. 370-373, Jun. 2005.
    [6] A. Bakker and J. H. Huijsing, High-Accuracy CMOS Smart Temperature Sensors. Boston:Kluwer Academic Publishers, 2000.
    [7] G. C. M. Meijer, G. Wang, and F. Fruett, “Temperature sensors and voltage references implemented in CMOS technology,” IEEE Sensors Journal., vol. 1, no. 3, pp. 225–234, Oct. 2001.
    [8] A. Bakker and J. H. Huijsing, “Micropower CMOS temperature sensor with digital output,” IEEE Journal of Solid-State Circuits, vol. 31, no. 7, pp. 933-937, Jul. 1996.
    [9] M. Tuthill, “A switched-current, switched-capacitor temperature-sensor in 0.6-μm CMOS,” IEEE Journal of Solid-State Circuits, vol. 33, no. 7, pp. 1117-1122, Jul. 1998.
    [10] E. Rotem, A. Naveh, et al., “Analysis of Thermal Monitor features of the Intel Pentium M Processor,” Proceedings of TACS-01, ISCA-31, 2004.
    [11] P. Chen, C. C. Chen, C. C. Tsai, W. F. Lu, “A Time-to-Digital-Converter-Based CMOS Smart Temperature Sensor,” IEEE Journal of Solid-State Circuits, vol. 40, no. 8, pp. 1642-1648, Aug. 2005.
    [12] T. A. Demassa and Z. Ciccone, Digital Integrated Circuits. New York: Wiley, 1996.
    [13] K. Kim, H. Lee, S. Jung and C. Kim, “A 366kS/s 400uW 0.0013mm2 Frequency-to-Digital Converter Based CMOS Temperature Sensor Utilizing Multiphase Clock” IEEE Custom Integrated Circuits Conf., pp. 203-206, Sep. 2009.
    [14] P. Krummenacher and H. Oguey, “Smart temperature sensor in CMOS technology,” Sensors and Actuators, A21-A23, pp. 636-638, 1990.
    [15] A. Bakker, “CMOS smart temperature sensors-an Overview,” Proc. IEEE Sensors, vol. 2, pp. 1423-1427, Jun. 2002.
    [16] K. E. Kuijk, “A precision reference voltage source,” IEEE Journal of Solid-State Circuits, vol. 8, no. 3, pp. 222-226, Jun. 1973.
    [17] D. Hilbiber, “A New Semiconductor Voltage Standard” ISSCC Dig. of Tech. Paper, pp. 32-33, Feb. 1964
    [18] B. Razavi, Design of Analog CMOS Integrated Circuits. New York: McGraw-Hill, 2001.
    [19] R. Widlar, “New developments in IC voltage regulators,” IEEE International Solid-State Circuits Conference, pp. 158-159, Feb. 1970.
    [20] S. J. Chang, Advanced analog IC design, EE, NCKU, 2003.
    [21] M. Sasaki, M. Ikeda and K. Asada. “A Temperature sensor with an inaccuracy of -1/+0.8°C using 90-nm 1-V CMOS for online thermal monitoring of VLSI circuits,” IEEE Transaction on Semiconductor Manufacturing. vol. 21, pp. 201 - 208, May. 2008.
    [22] I. M. Filanovsky and A. Allam, “Mutual compensation of mobility and threshold voltage temperature effects with applications in CMOS circuits,” IEEE Transactions on Circuits and Systems I, vol. 48, no. 7, pp. 876–884, Jul. 2001.
    [23] P. Ituero, J. L. Ayala, M. Lopez-Vallejo, “Leakage-based On-Chip Thermal Sensor for CMOS Technology,” IEEE International Symposium on Circuits and Systems, pp. 3327-3330, 2007.
    [24] K. Arabi and B. Kaminska, “Built-in temperature sensors for on-line thermal monitoring of microelectronic structures,” IEEE Computer Design: VLSI in Computers and Processors, pp. 462–467, Oct. 1997.
    [25] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design. Oxford University Press, 2002.
    [26] M. K. Law and A. Bermak, “A 405-nW CMOS Temperature Sensor Based on Linear MOS Operation,” IEEE Transactions on Circuits and Systems II, vol. 56, no. 12, pp. 891–895, Dec. 2009.
    [27] M. A. P. Pertijs, A. Bakker, and J. H. Huijsing, “A high-accuracy temperature sensor with second-order curvature correction and digital bus interface,” IEEE International Symposium on Circuits and Systems, pp. 368–371, May. 2001.
    [28] M. A. P. Pertijs, K. Makinwa and J. H. Huijsing, “A CMOS Smart Temperature Sensor With a 3σ Inaccuracy of 0.1 °C From 55 °C to 125 °C,” IEEE Journal of Solid-State Circuits, vol. 40, no. 12, pp. 2805-2815, Dec. 2005.
    [29] A. L. Aita, M. Pertijs, K. Makinwa, J. H. Huijsing, “A CMOS Smart Temperature Sensor with a Batch-Calibrated Inaccuracy of ±0.25°C (3σ) from -70°C to 130°C,” IEEE International Solid-State Circuits Conference, pp. 342-343, Feb. 2009.
    [30] F. Sebastiano, L. J. Breems, K. A. A. Makinwa, S. Drago, D. M. W. Leenaerts, B. Nauta, “A 1.2V 10μW NPN-Based Temperature Sensor in 65nm CMOS with an Inaccuracy of ±0.2°C (3σ) from –70°C to 125°C,” IEEE International Solid-State Circuits Conference, pp. 312-313, Feb. 2010.
    [31] K. Souri, Y. Chae, and K. Makinwa, “A CMOS Temperature Sensor With a Voltage-Calibrated Inaccuracy of 0.15°C (3σ) From -55°C to 125°C” IEEE Journal of Solid-State Circuits, vol. 48, no. 1, pp. 292-301, Jan. 2013.
    [32] C. K. Kim, B. S. Kong, C. G. Lee, Y. H. Jun, “ CMOS Temperature Sensor with Ring Oscillator for Mobile DRAM Self-refresh Control,” IEEE International Symposium on Circuits and Systems, pp. 3094-3097, May. 2008.
    [33] Y. Ren, C. Wang, H. Hong, “An all CMOS temperature sensor for thermal monitoring of VLSI circuits,” IEEE Circuits and Systems International Conference on Testing and Diagnosis, pp. 1-5, Apr. 2009.
    [34] S. Hwang et al., “A 0.008 mm2 500uW 469kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation,” IEEE Trans. Circuits Syst. I, Reg. Papers vol. 60, no. 9, pp. 2241–2248, Sept. 2013
    [35] Y. Tokunaga, S. Sakiyama, A. Matsumoto and S. Dosho, “An on-chip CMOS relaxation oscillator with voltage averaging feedback,” IEEE Journal of Solid-State Circuits, vol. 45, no. 6, pp. 1150-1158, Jun. 2010.
    [36] C. Zhao, J. He, S.H. Lee, K. Peterson and R. Geiger, D. Chen "A linear differential output of threshold-based CMOS temperature sensor with enhanced signal range" IEEE Midwest Symposium on Circuits and Systems, Aug. 2010.
    [37] C. Zhao, Y.T. Wang, D. Chen and R. Geiger, “Multi-threshold transistors cell for Low Voltage temperature sensing applications,” IEEE 54th International Midwest Symposium , 2011.
    [38] F. Serra-Graells and J. L. Huertas, “Sub-1-V CMOS proportional-to-absolute temperature references,” IEEE Journal of Solid-State Circuits, vol. 38, no. 1, Jan. 2003.
    [39] D. Johns and K. Martin, Analog Integrated Circuit Design, John Wiley & Sons Inc, 1997.
    [40] Q.A. Khan, S.K. Wadhwa and K. Misri, “Low power startup circuits for voltage and current reference with zero steady state current,” IEEE International Symposium on Low Power Electronics and Design, Aug. 2003.
    [41] J. Paul A. van der Wagt, Gordon G.Chu, and Christine LConrad, “A Layout Structure for Matching Many Integrated Resistors,” IEEE Transactions on Circuits and Systems I, vol. 51, pp. 186-190, Jan. 2004.
    [42] M. J. M. Pelgrom, A. C. J. Duinmaijer, and A. P. G. Welbers, “Matching properties of MOS transistors,” IEEE Journal of Solid-State Circuits, vol. 24, pp. 1433–1440, May 1989.
    [43] X. Dai, C. He, H. Xing, D. Chen, and R. Geiger, “An Nth order central symmetrical layout pattern for nonlinear gradients cancellation,” in Proc. IEEE International Symposium Circuits system., pp. 4835–4838, May 2005
    [44] F. Fiori and P. S. Crovetti, “New Compact Temperature-Compensated CMOS Current Reference,” IEEE Transactions on Circuits and Systems II, vol. 52, no. 11, Nov. 2005.
    [45] S. Guptam, V. Saxena, A. Campbell, and R. J. Baker, “W-2W Current Steering DAC for Programming Phase Change Memory,” Microelectronics and Electron Devices, April 2009.
    [46] A. Rossi, and G. Fucili, “Nonredundant successive approximation register for A/D converters,” IEEE Electronics Letters, vol. 32, no. 12, pp. 1055-1057, June 1996.
    [47] R. Nutt, “Digital Time Intervalometer,” Rev. Sci. Instrum, vol. 39, no. 9, pp. 1342-1345, Sep. 1968.
    [48] P. Dudek, S. Szczepancki and J.V. Hatfield, “A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line” IEEE Journal of Solid-State Circuits, vol. 35,
    no. 2, pp. 240-247, Feb. 2000.
    [49] E. Raisanen-Ruotsalainen, T. Rahkonen, J. Kostamovaara, “A low-power CMOS time-to-digital converter,” IEEE Journal of Solid-State Circuits, vol. 30, no. 9, pp. 984-990, Sep. 1995.
    [50] J. Yuan and C. Svensson, “High-speed CMOS circuit technique,” IEEE Journal of Solid-State Circuits, vol. 24, no. 1, pp. 62-70, Feb. 1989.
    [51] A. Hastings, The art of analog layout, Prentice Hall, 2001.
    [52] X. Tang, K.P. Pun, W.T. Ng, “A 0.9V 5kS/s resistor-based time-domain temperature sensor in 90nm CMOS with calibrated inaccuracy of −0.6°C/0.8°C from −40°C to 125°C,” Solid-State Circuits Conference, 2013 IEEE Asian, pp. 169 - 172, 11-13 Nov. 2013.
    [53] S. Hwang, J. Koo, K. Kim, H. Lee, C. Kim,“A 0.008 mm2 500uW 469kS/s Frequency-to-Digital Converter Based CMOS Temperature Sensor With Process Variation Compensation,” Circuits and Systems I: Regular Papers, IEEE Transactions on, vol. 60, no. 9, pp. 2241 - 2248, Sept. 2013.
    [54] G. Chowdhury and A. Hassibi, “An On-Chip Temperature Sensor With a Self-Discharging Diode in 32-nm SOI CMOS,” IEEE Transactions on Circuits and Systems II, vol. 59, no. 9, pp. 568–572, Sep. 2012.
    [55] P. Chen, C. C. Chen, Y. H. Peng, K. M. Wang, Y. S. Wang, “A Time-Domain SAR Smart Temperature Sensor With Curvature Compensation and a 3σ Inaccuracy of -0.4°C ~ +0.6°C Over a 0 °C to 90 °C Range,” IEEE Journal of Solid-State Circuits, vol. 45, no. 3, pp. 600-609, Mar. 2010.
    [56] W. Kyoungho, S. Meninger, T. Xanthopoulos, E. Crain, Ha. Dongwan, Ham, “Dual-DLL-Based CMOS All-Digital Temperature Sensor for Microprocessor Thermal Monitoring,” IEEE International Solid-State Circuits Conference, pp. 68-69, 69a, Feb. 2009.
    [57] D. D. Venuto and E. Stikvoort, “Low-Power CMOS Smart Temperature Sensor With a Batch-Calibrated Inaccuracy of ±0.25°C (±3σ) from −70°C to 130°C,” IEEE Sensors Journal., vol. 13, no. 5, pp. 1840-1848, May. 2013.
    [58] K. Souri, and K. Makinwa, “A 0.12 mm2 7.4 μW Micropower Temperature Sensor With an Inaccuracy of ±0.2°C (3σ) From -30°C to 125°C” IEEE Journal of Solid-State Circuits, vol. 46, no. 7, pp 1693-1700, July 2011.
    [59] C. K. Wu, W. S. Chan and T. H. Lin, “A 80kS/s 36uW resistor-based temperature sensorusing BGR-free SAR ADC with a unevenly-weighted resistor string in 0.18um CMOS,” IEEE Symposium on VLSI Circuits, pp. 222–223, Jun. 2011

    無法下載圖示 全文公開日期 2019/08/05 (校內網路)
    全文公開日期 本全文未授權公開 (校外網路)
    全文公開日期 本全文未授權公開 (國家圖書館:臺灣博碩士論文系統)
    QR CODE